ATxmega256A3U Atmel Corporation, ATxmega256A3U Datasheet - Page 3

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ATxmega256A3U

Manufacturer Part Number
ATxmega256A3U
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega256A3U

Flash (kbytes)
256 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
16
Eeprom (bytes)
4096
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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2. Overview
8331A–AVR–07/11
The AVR XMEGA AU microcontrollers is a family of low-power, high-performance, and periph-
eral-rich CMOS 8/16-bit microcontrollers based on the AVR enhanced RISC architecture. By
executing powerful instructions in a single clock cycle, the Atmel AVR XMEGA AU devices
achieve throughputs approaching one million instructions per second (MIPS) per megahertz,
allowing the system designer to optimize power consumption versus processing speed.
The AVR CPU combines a rich instruction set with 32 general purpose working registers. All 32
registers are directly connected to the arithmetic logic unit (ALU), allowing two independent reg-
isters to be accessed in a single instruction, executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs many times faster than conven-
tional single-accumulator or CISC based microcontrollers.
The Atmel AVR XMEGA AU devices provide the following features: in-system programmable
flash with read-while-write capabilities; internal EEPROM and SRAM; four-channel DMA control-
ler; eight-channel event system and programmable multilevel interrupt controller; up to 78
general purpose I/O lines; 16- or 32-bit real-time counter (RTC); up to eight flexible, 16-bit
timer/counters with capture, compare and PWM modes; up to eight USARTs; up to four I
SMBUS compatible two-wire serial interfaces (TWIs); one full-speed USB 2.0 interface; up to
four serial peripheral interfaces (SPIs); CRC module; AES and DES cryptographic engine; up to
two 8-channel, 12-bit ADCs with programmable gain; up to two 2-channel, 12-bit DACs; up to
four analog comparators with window mode; programmable watchdog timer with separate inter-
nal oscillator; accurate internal oscillators with PLL and prescaler; and programmable brown-out
detection.
The program and debug interface (PDI), a fast, two-pin interface for programming and debug-
ging, is available. Selected devices also have an IEEE std. 1149.1 compliant JTAG interface,
and this can also be used for on-chip debug and programming.
The Atmel AVR XMEGA AU devices have five software selectable power saving modes. The
idle mode stops the CPU while allowing the SRAM, DMA controller, event system, interrupt con-
troller, and all peripherals to continue functioning. The power-down mode saves the SRAM and
register contents, but stops the oscillators, disabling all other functions until the next TWI, USB
resume, or pin-change interrupt, or reset. In power-save mode, the asynchronous real-time
counter continues to run, allowing the application to maintain a timer base while the rest of the
device is sleeping. In standby mode, the external crystal oscillator keeps running while the rest
of the device is sleeping. This allows very fast startup from the external crystal, combined with
low power consumption. In extended standby mode, both the main oscillator and the asynchro-
nous timer continue to run. To further reduce power consumption, the peripheral clock to each
individual peripheral can optionally be stopped in active mode and idle sleep mode.
The devices are manufactured using Atmel high-density, nonvolatile memory technology. The
program flash memory can be reprogrammed in-system through the PDI or JTAG interfaces. A
boot loader running in the device can use any interface to download the application program to
the flash memory. The boot loader software in the boot flash section will continue to run while
the application flash section is updated, providing true read-while-write operation. By combining
an 8/16-bit RISC CPU with In-system, self-programmable flash, the AVR XMEGA AU is a pow-
erful microcontroller family that provides a highly flexible and cost effective solution for many
embedded applications.
Atmel AVR XMEGA AU
2
C and
3

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