M55800A Atmel Corporation, M55800A Datasheet - Page 166

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M55800A

Manufacturer Part Number
M55800A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of M55800A

Flash (kbytes)
0 Kbytes
Pin Count
176
Max. Operating Frequency
33 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
58
Ext Interrupts
58
Usb Speed
No
Usb Interface
No
Spi
1
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
72
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3/5.0
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
19.2.3
19.2.4
19.2.5
166
AT91M5880A
Clock Control
Timer Counter Operating Modes
Trigger
The clock of each counter can be controlled in two different ways: it can be enabled/disabled
and started/stopped.
Figure 19-3. Clock Control
Each Timer Counter channel can independently operate in two different modes:
The Timer Counter Mode is programmed with the WAVE bit in the TC Mode Register. In Capture
Mode, TIOA and TIOB are configured as inputs. In Waveform Mode, TIOA is always configured
to be an output and TIOB is an output if it is not selected to be the external trigger.
A trigger resets the counter and starts the counter clock. Three types of triggers are common to
both modes, and a fourth external trigger is available to each mode.
The following triggers are common to both modes:
• The clock can be enabled or disabled by the user with the CLKEN and the CLKDIS
• The clock can also be started or stopped: a trigger (software, synchro, external or compare)
• Capture Mode allows measurement on signals
• Waveform Mode allows wave generation
commands in the Control Register. In Capture Mode it can be disabled by an RB load event if
LDBDIS is set to 1 in TC_CMR. In Waveform Mode, it can be disabled by an RC Compare
event if CPCDIS is set to 1 in TC_CMR. When disabled, the start or the stop actions have no
effect: only a CLKEN command in the Control Register can re-enable the clock. When the
clock is enabled, the CLKSTA bit is set in the Status Register.
always starts the clock. The clock can be stopped by an RB load event in Capture Mode
(LDBSTOP = 1 in TC_CMR) or a RC compare event in Waveform Mode (CPCSTOP = 1 in
TC_CMR). The start and the stop commands have effect only if the clock is enabled.
Selected
Counter
Clock
Clock
Q
R
S
Trigger
CLKSTA
Q
CLKEN
S
R
Event
Stop
CLKDIS
Disable
Event
1745F–ATARM–06-Sep-07

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