M55800A Atmel Corporation, M55800A Datasheet - Page 27
M55800A
Manufacturer Part Number
M55800A
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(153 pages)
3.M55800A.pdf
(29 pages)
4.M55800A.pdf
(256 pages)
5.M55800A.pdf
(28 pages)
Specifications of M55800A
Flash (kbytes)
0 Kbytes
Pin Count
176
Max. Operating Frequency
33 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
58
Ext Interrupts
58
Usb Speed
No
Usb Interface
No
Spi
1
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
72
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3/5.0
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- M40800 PDF datasheet #2
- M55800A PDF datasheet #3
- M55800A PDF datasheet #4
- M55800A PDF datasheet #5
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- Download datasheet (5Mb)
11.3
11.4
1745F–ATARM–06-Sep-07
Data Bus Width
Byte-write or Byte-select Access
A data bus width of 8 or 16 bits can be selected for each chip select. This option is controlled by
the DBW field in the EBI_CSR (Chip-select Register) for the corresponding chip select.
Figure 11-2
Figure 11-2. Memory Connection for an 8-bit Data Bus
Figure 11-3
Figure 11-3. Memory Connection for a 16-bit Data Bus
Each chip select with a 16-bit data bus can operate with one of two different types of write
access:
This option is controlled by the BAT field in the EBI_CSR (Chip-select Register) for the corre-
sponding chip select.
Byte-write Access is used to connect 2 x 8-bit devices as a 16-bit memory page.
Figure 11-4
• Byte-write Access supports two Byte-write and a single read signal.
• Byte-select Access selects upper and/or lower byte with two byte-select lines, and separate
• The signal A0/NLB is not used.
• The signal NWR1/NUB is used as NWR1 and enables upper byte writes.
• The signal NWR0/NWE is used as NWR0 and enables lower byte writes.
• The signal NRD/NOE is used as NRD and enables half-word and byte reads.
read and write signals.
shows how to connect a 512K x 8-bit memory on NCS2.
shows how to connect a 512K x 16-bit memory on NCS2.
shows how to connect two 512K x 8-bit devices in parallel on NCS2.
EBI
EBI
D8 - D15
A1 - A19
D0 - D7
D8 - D15
A1 - A18
NCS2
D0 - D7
NWE
NOE
NWR1
NWR0
NUB
NLB
NCS2
NRD
A0
D0 - D7
D8 - D15
A0 - A18
Low Byte Enable
High Byte Enable
Write Enable
Output Enable
Memory Enable
D0 - D7
A1 - A18
A0
Write Enable
Output Enable
Memory Enable
AT91M5880A
27
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