SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 581

• Manufacturer Part Number: SAM3SD8C
• Manufacturer: Atmel Corporation

28.9.5
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• CKS: Transmit Clock Selection
• CKO: Transmit Clock Output Mode Selection
• CKI: Transmit Clock Inversion
0 = The data outputs (Data and Frame Sync signals) are shifted out on Transmit Clock falling edge. The Frame sync signal
input is sampled on Transmit clock rising edge.
1 = The data outputs (Data and Frame Sync signals) are shifted out on Transmit Clock rising edge. The Frame sync signal
input is sampled on Transmit clock falling edge.
CKI affects only the Transmit Clock and not the output clock signal.
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Value
Value
3-7
31
23
15
0
1
2
3
0
1
2
–
7
SSC Transmit Clock Mode Register
CKG
Name
MCK
TK
RK
Name
NONE
CONTINUOUS
TRANSFER
30
22
14
SSC_TCMR
0x40004018
Read-write
–
6
Description
Divided Clock
TK Clock signal
RK pin
Reserved
Description
None
Continuous Receive Clock
Transmit Clock only during data transfers
Reserved
CKI
29
21
13
–
5
28
20
12
–
4
PERIOD
STTDLY
“SSC Write Protect Mode Register”
CKO
27
19
11
3
TK Pin
Input-only
Output
Output
26
18
10
2
START
SAM3S8/SD8
SAM3S8/SD8
.
25
17
9
1
CKS
24
16
8
0
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