SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 676
SAM3SD8C
Manufacturer Part Number
SAM3SD8C
Description
Manufacturer
Atmel Corporation
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• DLYBCT: Delay Between Consecutive Transfers
This field defines the delay between two consecutive transfers with the same peripheral without removing the chip select.
The delay is always inserted after each transfer and before removing the chip select if needed.
When DLYBCT equals zero, no delay between consecutive transfers is inserted and the clock keeps its duty cycle over the
character transfers.
Otherwise, the following equation determines the delay:
676
676
SAM3S8/SD8
SAM3S8/SD8
Delay Between Consecutive Transfers
=
32
------------------------------------ -
×
MCK
DLYBCT
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
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