SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 930

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SAM3SD8C

Manufacturer Part Number
SAM3SD8C
Description
Manufacturer
Atmel Corporation
Datasheets
35.7.23
Name:
Address:
Access:
This register can only be written if the bits WPSWS5 and WPHWS5 are cleared in
page
• FPOL: Fault Polarity (fault input bit varies from 0 to 5)
For each field bit y (fault input number):
• FMOD: Fault Activation Mode (fault input bit varies from 0 to 5)
For each field bit y (fault input number):
Note:
• FFIL: Fault Filtering (fault input bit varies from 0 to 5)
For each field bit y (fault input number):
CAUTION: To prevent an unexpected activation of the status flag FSy in the
bit FMODy can be set to “1” only if the FPOLy bit has been previously configured to its final value.
930
930
0 = The fault y becomes active when the fault input y is at 0.
1 = The fault y becomes active when the fault input y is at 1.
0 = The fault y is active until the Fault condition is removed at the peripheral
1 = The fault y stays active until the Fault condition is removed at the peripheral
“PWM Fault Clear Register”
0 = The fault input y is not filtered.
1 = The fault input y is filtered.
939.
31
23
15
7
1. The Peripheral generating the fault.
SAM3S8/SD8
SAM3S8/SD8
PWM Fault Mode Register
PWM_FMR
0x4002005C
Read-write
30
22
14
6
.
29
21
13
5
28
20
12
4
FMOD
FPOL
FFIL
27
19
11
3
“PWM Fault Status Register” on page
(1)
“PWM Write Protect Status Register” on
level.
26
18
10
2
(1)
level AND until it is cleared in the
25
17
9
1
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
24
16
8
0
931, the

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