AD9648 Analog Devices, AD9648 Datasheet - Page 27

• Manufacturer Part Number: AD9648
• Description: 14-Bit, 125 MSPS/105 MSPS, 1.8 V Dual Analog-to-Digital Converter
• Manufacturer: Analog Devices

Specifications of AD9648

• Resolution (bits): 14bit
• # Chan: 2
• Sample Rate: 125MSPS
• Interface: Par
• Analog Input Type: Diff-Uni
• Ain Range: (2Vref) p-p,2 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

1V p-p
In any configuration, the value of Shunt Capacitor C is dependent
on the input frequency and source impedance and may need to
be reduced or removed. Table 11 displays the suggested values to
set the RC network. However, these values are dependent on the
input signal and should be used only as a starting guide.
Table 11. Example RC Network
Frequency Range (MHz)
0 to 70
70 to 200
Single-Ended Input Configuration
A single-ended input can provide adequate performance in
cost-sensitive applications. In this configuration, SFDR and
distortion performance degrade due to the large input common-
mode swing. If the source impedances on each input are matched,
there should be little effect on SNR performance. Figure 48
shows a typical single-ended input configuration.
VOLTAGE REFERENCE
A stable and accurate 1.0 V voltage reference is built into the
AD9648. The VREF can be configured using either the internal
1.0 V reference or an externally applied 1.0 V reference voltage.
The various reference modes are summarized in the sections that
follow. The Reference Decoupling section describes the best
practices PCB layout of the reference.
Internal Reference Connection
A comparator within the
SENSE pin and configures the reference into two possible
modes, which are summarized in Table 12. If SENSE is grounded,
Table 12. Reference Configuration Summary
Selected Mode
Fixed Internal Reference
Fixed External Reference
10µF
49.9Ω
Figure 48. Single-Ended Input Configuration
0.1µF
10µF
0.1µF
AVDD
AD9648
1kΩ
1kΩ
1kΩ
1kΩ
AVDD
R Series
(Ω Each)
33
125
R
R
C
SENSE Voltage (V)
AGND to 0.2
AVDD
detects the potential at the
C Differential (pF)
22
Open
VIN+x
VIN–x
ADC
Resulting VREF (V)
1.0 internal
1.0 applied to external VREF pin
Rev. 0 | Page 27 of 44
the reference amplifier switch is connected to the internal resistor
divider (see Figure 49), setting VREF to 1.0 V.
If the internal reference of the
converters to improve gain matching, the loading of the reference
by the other converters must be considered. Figure 50 shows
how the internal reference voltage is affected by loading.
–0.5
–1.0
–1.5
–2.0
–3.0
–2.5
0
1.0µF
0
0.2
VIN+A/VIN+B
VIN–A/VIN–B
Figure 49. Internal Reference Configuration
Figure 50. V
0.1µF
0.4
SENSE
VREF
Resulting Differential Span (V p-p)
2.0
2.0
0.6
LOAD CURRENT (mA)
REF
0.8
Accuracy vs. Load Current
INTERNAL V
AD9648
SELECT
1.0
LOGIC
1.2
REF
is used to drive multiple
ADC
= 1.00V
1.4
0.5V
CORE
ADC
1.6
AD9648
1.8
2.0