AD9648 Analog Devices, AD9648 Datasheet - Page 9

no-image

AD9648

Manufacturer Part Number
AD9648
Description
14-Bit, 125 MSPS/105 MSPS, 1.8 V Dual Analog-to-Digital Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD9648

Resolution (bits)
14bit
# Chan
2
Sample Rate
125MSPS
Interface
Par
Analog Input Type
Diff-Uni
Ain Range
(2Vref) p-p,2 V p-p
Adc Architecture
Pipelined
Pkg Type
CSP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9648BCPZ-105
Manufacturer:
AD
Quantity:
1 001
Part Number:
AD9648BCPZ-125
Manufacturer:
AD
Quantity:
456
Part Number:
AD9648BCPZ-125
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Part Number:
AD9648BCPZRL7-105
Manufacturer:
ATHEROS
Quantity:
5 194
Part Number:
AD9648BCPZRL7-125
Manufacturer:
AD
Quantity:
456
TIMING SPECIFICATIONS
Table 5.
Parameter
SYNC TIMING
REQUIREMENTS
SPI TIMING
REQUIREMENTS
Timing Diagrams
t
t
t
t
t
t
t
t
t
t
t
SSYNC
HSYNC
DS
DH
CLK
S
H
HIGH
LOW
EN_SDIO
DIS_SDIO
CH A/CH B DATA
DCOA/DCOB
CLK+
CLK–
VIN
Description
SYNC to rising edge of CLK+ setup time
SYNC to rising edge of CLK+ hold time
Setup time between the data and the rising edge of SCLK
Hold time between the data and the rising edge of SCLK
Period of the SCLK
Setup time between CSB and SCLK
Hold time between CSB and SCLK
SCLK pulse width high
SCLK pulse width low
Time required for the SDIO pin to switch from an input to an output relative
to the SCLK falling edge
Time required for the SDIO pin to switch from an output to an input relative
to the SCLK rising edge
N – 1
t
CH
Figure 2. CMOS Default Output Mode Data Output Timing
N – 17
t
PD
N
t
t
A
CLK
t
DCO
t
N – 16
SKEW
Rev. 0 | Page 9 of 44
N + 1
N – 15
N + 2
N – 14
N + 3
N – 13
Limit
0.24
0.40
2
2
40
2
2
10
10
10
10
N + 4
N – 12
N + 5
Unit
ns typ
ns typ
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
AD9648

Related parts for AD9648