AD9262 Analog Devices, AD9262 Datasheet - Page 17

• Manufacturer Part Number: AD9262
• Description: 16-Bit, 2.5 MHz/5 MHz/10 MHz, 30 MSPS to 160 MSPS Dual Continuous Time Sigma-Delta ADC
• Manufacturer: Analog Devices

Specifications of AD9262

• Resolution (bits): 16bit
• # Chan: 2
• Sample Rate: 160MSPS
• Interface: Par
• Analog Input Type: Diff-Uni
• Ain Range: 2 V p-p
• Adc Architecture: Sigma-Delta
• Pkg Type: CSP

Input Common Mode
The analog inputs of the AD9262 are not internally dc biased. In
ac-coupled applications, the user must provide this bias externally.
Setting the device such that V
optimum performance. The analog inputs are 500 Ω resistors,
and the internal reference loop aims to develop 0.5 V across
each input resistor (see Figure 44). With 0 V differential input,
the driver sources 1 mA into each analog input.
Differential Input Configurations
The AD9262 can also be configured for differential inputs. The
ADA4937-2
and a flexible interface to the ADC. The output common-mode
voltage of the ADA4937-2 is easily set by connecting AVDD to
the V
linearity of the ADA4937-2 need important consideration because
the system performance may be limited by the ADA4937-2.
For frequencies offset from dc, where SNR is a key parameter,
differential transformer coupling is the recommended input
configuration. An example is shown in Figure 46. The center
tap of the secondary winding of the transformer is connected to
AVDD to bias the analog input.
The signal characteristics must be considered when selecting a
transformer. Most RF transformers saturate at frequencies
below a couple of megahertz (MHz), and excessive signal power
can cause core saturation, which leads to distortion.
V
V
CM
IN
p-p = 2V
= AVDD
V
Figure 45. Differential Input Configuration Using the ADA4937-2
OCM2
50Ω
SOURCE
S
SIGNAL
49.9Ω
VIN+x
0.1µF
VIN–x
pin of the ADA4937-2 (see Figure 45). The noise and
differential driver provides excellent performance
2V p-p
500Ω
500Ω
R
60.4
Figure 44. Input Common Mode
T
60.4Ω
AVDD – 0.5V
V
200Ω
OCM2
0.1µF
DAC
11
6
7
0.1µF
ADA4937-2
CM
15
+5V
–5V
9
= AVDD is recommended for
200Ω
200Ω
12
13
VIN–x
VIN+x
TO LOOP FILTER
FROM QUANTIZER
STAGE 2
AD9262
+1.8V
AVDD
0.1µF
Rev. A | Page 17 of 32
Voltage Reference
A stable and accurate 0.5 V voltage reference is built into the
AD9262. The reference voltage should be decoupled to minimize
the noise bandwidth using a 10 μF capacitor. The reference is
used to generate a bias current into a matched resistor such that,
when used to bias the current in the feedback DAC, a voltage
of AVDD − 0.5 V is developed at the internal side of the input
resistors (see Figure 47). The current bias circuit should also be
decoupled on the CFILT pin with a 10 μF capacitor. For this
reason, the VREF voltage should always be 0.5 V.
Internal Reference Connection
To minimize thermal noise, the internal reference on the AD9262
is an unbuffered 0.5 V. It has an internal 10 kΩ series resistor,
which, when externally decoupled with a 10 μF capacitor, limits
the noise (see Figure 48). The unbuffered reference should not
be used to drive any external circuitry. The internal reference is
used by default and when Serial Register 0x18[6] is reset.
0.5V
10µF
VREF
10kΩ
V
10µF
50Ω
10µF
SOURCE
S
SIGNAL
Figure 46. Differential Transformer Configuration
Figure 48. Internal Reference Configuration
V
V IN p-p = 2V
TO CURRENT
GENERATOR
CM
CFILT
Figure 47. Voltage Reference Loop
AVDD – 0.5V
= AVDD
2V p-p
10kΩ
REF
R
50Ω
T
VIN+x
VIN–x
0.5V
1:1
AVDD
500Ω
500Ω
500Ω
0.1µF
2.85kΩ
VIN+x
VIN–x
AVDD – 0.5V
3.5kΩ
AD9262
8.5kΩ
AVDD
AD9262
TO LOOP
STAGE 2
FILTER