AD9262 Analog Devices, AD9262 Datasheet - Page 23

• Manufacturer Part Number: AD9262
• Description: 16-Bit, 2.5 MHz/5 MHz/10 MHz, 30 MSPS to 160 MSPS Dual Continuous Time Sigma-Delta ADC
• Manufacturer: Analog Devices

Specifications of AD9262

• Resolution (bits): 16bit
• # Chan: 2
• Sample Rate: 160MSPS
• Interface: Par
• Analog Input Type: Diff-Uni
• Ain Range: 2 V p-p
• Adc Architecture: Sigma-Delta
• Pkg Type: CSP

Cascaded Filter Responses
The cascaded filter responses for the three signal bandwidth
settings are for a 160 MSPS output data rate, as shown in Figure 55,
Figure 56, and Figure 57.
–100
–120
–140
–160
–100
–120
–140
–160
–100
–120
–140
–160
–20
–40
–60
–80
–20
–40
–60
–80
–20
–40
–60
–80
0
0
0
0
0
0
Figure 57. 2.5 MHz Signal Bandwidth, 160 MSPS
Figure 55. 10 MHz Signal Bandwidth, 160 MSPS
Figure 56. 5 MHz Signal Bandwidth, 160 MSPS
10
10
10
20
20
20
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
30
30
30
–0.04
–0.08
–0.04
–0.08
–0.04
–0.08
0.08
0.04
0.08
0.04
0.08
0.04
0
0
0
0
0
40
40
40
0.5
2
1
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
50
50
50
4
2
1.5
60
60
60
6
3
8
4
70
70
70
2.5
10
5
80
80
80
Rev. A | Page 23 of 32
DC AND QUADRATURE ERROR CORRECTION (QEC)
In direct conversion or other quadrature systems, mismatches
between the real (I) and imaginary (Q) signal paths cause
frequencies in the positive spectrum to image into the negative
spectrum and vice versa. From an RF point of view, this is
equivalent to information above the LO frequency interfering
with information below the LO frequency, and vice versa. These
mismatches may occur from gain and/or phase mismatches in
the analog quadrature demodulator or in any components in
the ADC signal chain itself. In a single-carrier zero-IF system
where the carrier has been placed symmetrically around dc, this
causes self-distortion of the carrier as the two sidebands fold
onto one another and degrade the EVM of the signal.
In a multicarrier communication system, this can be even more
problematic because carriers of widely different power levels
can interfere with one another. For example, a large carrier
centered at +f1 can have an image appear at –f1 that can be
larger than the desired carrier at this frequency.
The integrated quadrature error correction (QEC) algorithm of
the AD9262 attempts to measure and correct the amplitude and
phase imbalances of the I and Q signal paths to achieve higher
levels of image suppression than is achievable by analog means
alone. These errors can be corrected in an adapted manner
where the I and Q gain and quadrature phase mismatches are
constantly estimated and corrected. This allows changes in the
mismatches due to slow supply and temperature changes to be
constantly tracked.
The quadrature errors are corrected in a frequency independent
manner on the AD9262; therefore, systems with significant
mismatch in the baseband chain may have reduced image
suppression. The AD9262 QEC still corrects the systematic
imbalances.
The convergence time of the QEC algorithm is dependent on
the statistics of the input signal. For large signals and large
imbalance errors, this convergence time is typically less than
two million samples of the AD9262 output data rate.
LO Leakage (DC) Correction
In a direct conversion receiver subsystem, LO to RF leakage of
the quadrature modulator shows up as dc offsets at baseband.
These offsets are added to dc offsets in the baseband signal
paths, and both contribute to a carrier at dc. In a zero-IF receiver,
this dc energy can cause problems because it appears in band of
a desired channel. As part of the AD9262 QEC function, the dc
offset is suppressed by applying a low frequency notch filter to
form a null around dc. The 3 dB bandwidth of this notch filter
vs. the AD9262 output data rates is shown in Figure 58.
AD9262