AD7938-6 Analog Devices, AD7938-6 Datasheet - Page 13

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AD7938-6

Manufacturer Part Number
AD7938-6
Description
8-Channel, 625 kSPS, 12-Bit Parallel ADCs with a Sequencer
Manufacturer
Analog Devices
Datasheet

Specifications of AD7938-6

Resolution (bits)
12bit
# Chan
8
Sample Rate
625kSPS
Interface
Par
Analog Input Type
Diff-Uni,SE-Uni
Ain Range
Uni (Vref),Uni (Vref) x 2
Adc Architecture
SAR
Pkg Type
CSP,QFP
Data Sheet
ON-CHIP REGISTERS
The AD7938-6 has two on-chip registers that are necessary for
the operation of the device. These are the control register, which
is used to set up different operating conditions, and the shadow
register, which is used to program the analog input channels to
be converted.
CONTROL REGISTER
The control register on the AD7938-6 is a 12-bit, write-only
register. Data is written to this register using the CS and WR
Table 6. Control Register Bits
MSB
DB11
PM1
Table 7. Control Register Bit Function Description
Bit No.
11, 10
9
8
7 to 5
4, 3
2
1
0
Table 8. Power Mode Selection using the Power Management Bits in the Control Register
PM1
0
0
1
1
PM0
0
1
0
1
Mnemonic
PM1, PM0
CODING
REF
ADD2 to
ADD0
MODE1,
MODE0
SHDW
SEQ
RANGE
DB10
PM0
Mode
Normal Mode
Autoshutdown
Autostandby
Full Shutdown
DB9
CODING
Description
Power Management Bits. These two bits are used to select the power mode of operation. The user can choose
between either normal mode or various power-down modes of operation as shown in Table 8.
This bit selects the output coding of the conversion result. If this bit is set to 0, the output coding is straight
(natural) binary. If this bit is set to 1, the output coding is twos complement.
This bit selects whether the internal or external reference is used to perform the conversion. If this bit is Logic 0, an
external reference should be applied to the V
Reference section.
These three address bits are used to either select which analog input channel is converted in the next conversion if
the sequencer is not used, or to select the final channel in a consecutive sequence when the sequencer is used as
described in Table 10. The selected input channel is decoded as shown in Table 9.
The two mode pins select the type of analog input on the eight V
ended inputs, four fully differential inputs, four pseudo differential inputs, or seven pseudo differential inputs. See
Table 9.
The SHDW bit in the control register is used in conjunction with the SEQ bit to control the sequencer function and
access the SHDW register. See Table 10.
The SEQ bit in the control register is used in conjunction with the SHDW bit to control the sequencer function and
access the SHDW register. See Table 10.
This bit selects the analog input range of the AD7938-6. If it is set to 0, then the analog input range extends from
0 V to V
be 4.75 V to 5.25 V if a 2.5 V reference is used; otherwise, care must be taken to ensure that the analog input remains
within the supply rails. See the Analog Inputs section for more information.
REF
Description
When operating in normal mode, all circuitry is fully powered up at all times.
When operating in autoshutdown mode, the AD7938-6 enters full shutdown mode at the end of each
conversion. In this mode, all circuitry is powered down.
When the AD7938-6 enters this mode, all circuitry is powered down except for the reference and reference
buffer. This mode is similar to autoshutdown mode, but it allows the part to power up in 7 μs (or 600 ns if
an external reference is used). See the Power Modes of Operation section for more information.
When the AD7938-6 enters this mode, all circuitry is powered down. The information in the control register
is retained.
. If it is set to 1, the analog input range extends from 0 V to 2 × V
DB8
REF
DB7
ADD2
DB6
ADD1
Rev. C | Page 13 of 32
REF
DB5
ADD0
pin. If this bit is Logic 1, the internal reference is selected. See the
pins. The control register is shown in
of the bits are described in
settings in the control register are all 0s. When writing to the
control register between conversions, ensure that
returns high before the write is performed.
DB4
MODE1
IN
pins. The AD7938-6 can have either eight single-
DB3
MODE0
REF
. When this range is selected, V
Table 7
DB2
SHDW
. At power-up, the default bit
Table 6
DB1
SEQ
and the functions
AD7938-6
CONVST
LSB
DB0
RANGE
DD
must

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