AD7938-6 Analog Devices, AD7938-6 Datasheet - Page 8

• Manufacturer Part Number: AD7938-6
• Description: 8-Channel, 625 kSPS, 12-Bit Parallel ADCs with a Sequencer
• Manufacturer: Analog Devices

Specifications of AD7938-6

• Resolution (bits): 12bit
• # Chan: 8
• Sample Rate: 625kSPS
• Interface: Par
• Analog Input Type: Diff-Uni,SE-Uni
• Ain Range: Uni (Vref),Uni (Vref) x 2
• Adc Architecture: SAR
• Pkg Type: CSP,QFP

AD7938-6
Pin No.
19
20
21
22
23 to 30
31
32
Mnemonic
RD
CS
AGND
V
V
V
W/B
EPAD
REFIN
IN
DD
0 to V
/V
REFOUT
IN
7
Description
Read Input. Active low logic input used in conjunction with CS to access the conversion result. The conversion
result is placed on the data bus following the falling edge of RD read while CS is low.
Chip Select. Active low logic input used in conjunction with RD and WR to read conversion data or to write data
to the internal registers.
Analog Ground. This is the ground reference point for all analog circuitry on the AD7938-6. All analog
input signals and any external reference signal should be referred to this AGND voltage. The AGND and
DGND voltages should ideally be at the same potential and must not be more than 0.3 V apart, even on a
transient basis.
Reference Input/Output. This pin is connected to the internal reference and is the reference source for the
ADC. The nominal internal reference voltage is 2.5 V and this appears at this pin. It is recommended that this pin
be decoupled to AGND with a 470 nF capacitor. This pin can be overdriven by an external reference. The input
voltage range for the external reference is 0.1 V to V
input range does not exceed V
Analog Input 0 to Analog Input 7. Eight analog input channels that are multiplexed into the on-chip track-and-
hold. The analog inputs can be programmed to be eight single-ended inputs, four fully differential pairs, four
pseudo differential pairs, or seven pseudo differential inputs by setting the MODE bits in the control register
appropriately (see Table 9). The analog input channel to be converted can either be selected by writing to the
address bits (ADD2 to ADD0) in the control register prior to the conversion or the on-chip sequencer can be
used. The SEQ and SHDW bits in conjunction with the address bits in the control register allow the shadow
register to be programmed. The input range for all input channels can either be 0 V to V
the coding can be binary or twos complement, depending on the states of the RANGE and CODING bits in the
control register. Any unused input channels should be connected to AGND to avoid noise pickup.
Power Supply Input. The V
with a 0.1 μF capacitor and a 10 μF tantalum capacitor.
Word/Byte Input. When this input is logic high, data is transferred to and from the AD7938-6 in 12-bit words on
Pin DB0 to Pin DB11. When this pin is logic low, byte transfer mode is enabled. Data and the channel ID are
transferred on Pin DB0 to Pin DB7, and Pin DB8/HBEN assumes its HBEN functionality. Unused data lines when
operating in byte transfer mode should be tied off to DGND.
Exposed Pad. The exposed pad is located on the underside of the package. Connect the EPAD to the ground
plane of the PCB using multiple vias.
DD
range for the AD7938-6 is 2.7 V to 5.25 V. The supply should be decoupled to AGND
DD
+ 0.3 V. See the Reference section.
Rev. C | Page 8 of 32
DD
; however, care must be taken to ensure that the analog
REF
or 0 V to 2 × V
Data Sheet
REF
, and