AD8067 Analog Devices, AD8067 Datasheet - Page 13

• Manufacturer Part Number: AD8067
• Manufacturer: Analog Devices

Specifications of AD8067

• Vcc-vee: 5V to 24V
• Isy Per Amplifier: 7mA
• Packages: SOT
• -3db Bandwidth: 54MHz
• Slew Rate: 640V/µs
• Vos: 200µV
• Ib: 0.6pA
• # Opamps Per Pkg: 1
• Input Noise (nv/rthz): 6.6nV/rtHz

THEORY OF OPERATION
The AD8067 is a low noise, wideband, voltage feedback
operational amplifier that combines a precision JFET input
stage with Analog Devices’ dielectrically isolated eXtra Fast
Complementary Bipolar (XFCB) process BJTs. Operating
supply voltages range from 5 V to 24 V. The amplifier features a
patented rail-to-rail output stage capable of driving within
0.25 V of either power supply while sourcing or sinking 30 mA.
The JFET input, composed of N-channel devices, has a
common-mode input range that includes the negative supply
rail and extends to 3 V below the positive supply. In addition,
the potential for phase reversal behavior was eliminated for all
input voltages within the power supplies.
The combination of low noise, dc precision, and high
bandwidth makes the AD8067 uniquely suited for wideband,
very high input impedance, high gain buffer applications. It is
also useful in wideband transimpedance applications, such as a
photodiode interface, that require very low input currents and
dc precision.
BASIC FREQUENCY RESPONSE
The AD8067’s typical open-loop response (see Figure 41) shows
a phase margin of 60° at a gain of +10. Typical configurations
for noninverting and inverting voltage gain applications are
shown in Figure 40 and Figure 42.
The closed-loop frequency response of a basic noninverting
gain configuration can be approximated by:
GBP is the gain bandwidth product of the amplifier. Typical
GBP for the AD8067 is 300 MHz. See Table 5 for the
recommended values for R
DC Gain = R
Closed
Noninverti
SOURCE
SIGNAL
V
I
Loop–3
R
S
Figure 40. Noninverting Gain Configuration
ng
F
R
/R
Configurat
X
dB
G
AD8067
+ 1
+
–
Frequency
–V
FOR BEST PERFORMANCE,
SET R
G
S
0.1μF
and R
R
ion
F
0.1μF
S
+ R
Noise
=
F
.
(
X
GBP
= R
+
10μF
Gain
G
)
+
|| R
×
10μF
R
F
(
=
R
LOAD
F
R
R
R
+
G
F
G
R
+
G
+
V
–
1
)
OUT
Rev. A | Page 13 of 24
The bandwidth formula only holds true when the phase margin
of the application approaches 90°, which it will in high gain
configurations. The bandwidth of the AD8067 used in a
G = +10 buffer is 54 MHz, considerably faster than the 30 MHz
predicted by the closed loop –3 dB frequency equation. This
extended bandwidth is due to the phase margin being at 60°
instead of 90°. Gains lower than +10 show an increased amount
of peaking, as shown in Figure 4. For gains lower than +7, use
the AD8065, a unity gain stable JFET input op amp with a unity
gain bandwidth of 145 MHz, or refer to the Applications section
for using the AD8067 in a gain of 2 configuration.
Table 5. Recommended Values of R
Gain
10
20
50
100
–10
90
80
70
60
50
40
30
20
10
0
0.01
SOURCE
SIGNAL
V
I
R
S
FOR BEST PERFORMANCE, SET R
Figure 41. Open-Loop Frequency Response
R
110
49.9
20
10
R
0.1
Figure 42. Inverting Gain Configuration
G
X
(Ω)
R
G
FREQUENCY – MHz
AD8067
+
–
1
R
1
1
1
1
GAIN
–V
F
S
(kΩ)
0.1μF
R
F
0.1μF
PHASE
10
G
and R
+
10μF
X
= (R
BW (MHz)
54
15
6
3
+
F
10μF
100
S
R
+ R
LOAD
G
) || R
AD8067
+
V
–
1000
F
OUT
120
90
60
30
0
–30
–60
–90
–120
–150
–180