ADP8860 Analog Devices, ADP8860 Datasheet - Page 30

• Manufacturer Part Number: ADP8860
• Description: Charge Pump, 7-Channel Smart LED Driver with I2C Interface
• Manufacturer: Analog Devices

Specifications of ADP8860

• Vin Range: 2.4V to 5.5V
• Vout (v): 4.3 to 5.5
• Synchronous: No
• Package: 20-Lead WLCSP
• Led Configuration: Parallel
• Topology: Capacitive
• I2c Support: Yes
• Max Iout (ma): 60mA
• Brightness Control: I2C
• Peak Efficiency (%): 89%
• Switching Frequency: 1MHz

ADP8860
Bit Name
CMP_IEN
BACKLIGHT REGISTER DESCRIPTIONS
Configuration Register (CFGR)—Register 0x04
Table 16. CFGR Bit Map
Bit 7
Reserved
Table 17. Bit Descriptions for the CFGR Register
Bit Name
N/A
SEL_AB
CMP2_SEL
BLV
Law
FOVR
Backlight Sink Enable (BLSEN)—Register 0x05
Table 18. BLSEN Bit Map
Bit 7
Reserved
Table 19. Bit Descriptions for the BLSEN Register
Bit Name
N/A
D7EN
D6EN
Bit No.
7
6
5
4:3
2:1
0
Bit No.
0
Description
Reserved.
1 = selects the second phototransistor (CMP_IN2) to control the backlight.
0 = selects the main phototransistor (CMP_IN) to control the backlight.
1 = the second phototransistor is enabled; the current sink on D6 is disabled.
0 = the second phototransistor is disabled.
Brightness level. This field indicates the brightness level at which the device is operating. The software may force the
backlight to operate at one of the three brightness levels. Setting CMP_AUTOEN high (Register 0x01) sets these
values automatically and overwrites any previously written values.
00 = Level 1 (daylight).
01 = Level 2 (office).
10 = Level 3 (dark).
11 = off (backlight set to 0 mA).
Backlight transfer law.
00 = linear law DAC, linear time steps.
01 = square law DAC, linear time steps.
10 = square law DAC, nonlinear time steps (Cubic 10).
11 = square law DAC, nonlinear time steps (Cubic 11).
Backlight fade override.
1 = the backlight fade override is enabled.
0 = the backlight fade override is disabled.
Bit No.
7
6
5
Bit 6
SEL_AB
Bit 6
D7EN
Description
When the CMP_INT status bit is set after an enabled comparator trips, an interrupt is raised if the CMP_IEN flag is
enabled.
1 = the main comparator interrupt is enabled.
0 = the main comparator interrupt is disabled (the CMP_INT flag continues to assert).
Bit 5
D6EN
Description
Reserved.
Diode 7 backlight sink enable.
1 = selects LED7 as an independent sink.
0 = connects LED7 sink to backlight enable (BL_EN).
Diode 6 backlight sink enable.
1 = selects LED6 as an independent sink.
0 = connects LED6 sink to backlight enable (BL_EN).
Bit 5
CMP2_SEL
Bit 4
D5EN
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Bit 4
Bit 3
D4EN
BLV
Bit 3
Bit 2
D3EN
Bit 2
Law
Bit 1
D2EN
Bit 1
Bit 0
D1EN
Bit 0
FOVR