ADUC7028 Analog Devices, ADUC7028 Datasheet - Page 9

• Manufacturer Part Number: ADUC7028
• Manufacturer: Analog Devices

Specifications of ADUC7028

• Mcu Core: ARM7 TDMI
• Mcu Speed (mips): 40
• Flash (kbytes): 62Bytes
• Sram (bytes): 8192Bytes
• Gpio Pins: 40
• Adc # Channels: 8

TIMING SPECIFICATIONS
Table 2. External Memory Write Cycle
Parameter
CLK
t
t
t
t
t
t
t
t
t
t
t
t
t
1
MS_AFTER_CLKH
ADDR_AFTER_CLKH
AE_H_AFTER_MS
AE
HOLD_ADDR_AFTER_AE_L
HOLD_ADDR_BEFORE_WR_L
WR_L_AFTER_AE_L
DATA_AFTER_WR_L
WR
WR_H_AFTER_CLKH
HOLD_DATA_AFTER_WR_H
BEN_AFTER_AE_L
RELEASE_MS_AFTER_WR_H
See Table 78.
1
AD[16:1]
MSx
BHE
CLK
BLE
A16
WS
AE
RS
FFFF
t
t
AE_H_AFTER_MS
HOLD_ADDR_BEFORE_WR_L
t
t
MS_AFTER_CLKH
HOLD_ADDR_AFTER_AE_L
CLK
t
ADDR_AFTER_CLKH
9ABC
t
Min
0
4
8
0
AE
t
Figure 3. External Memory Write Cycle (See Table 78)
WR_L_AFTER_AE_L
t
BEN_AFTER_AE_L
t
DATA_AFTER_WR_L
t
WR
5678
Typ
UCLK
½ CLK
(XMxPAR[14:12] + 1) × CLK
½ CLK + (!XMxPAR[10]) × CLK
(!XMxPAR[8]) × CLK
½ CLK + (!XMxPAR[10] + !XMxPAR[8]) × CLK
(XMxPAR[7:4] + 1) × CLK
(!XMxPAR[8]) × CLK
½ CLK
(!XMxPAR[8] + 1) × CLK
Rev. D | Page 9 of 96
t
WR_H_AFTER_CLKH
t
HOLD_DATA_AFTER_WR_H
9ABE
ADuC7019/20/21/22/24/25/26/27/28/29
t
RELEASE_MS_AFTER_WR_H
Max
4
8
12
4
1234
Unit
ns
ns
ns
ns