ADP1043A Analog Devices, ADP1043A Datasheet - Page 36

• Manufacturer Part Number: ADP1043A
• Description: Digital Controller for Isolated Power Supply Applications
• Manufacturer: Analog Devices

ADP1043A
Table 11. Register 0x03—Fault Register 4 and Register 0x07—Latched Fault Register 4 (1 = Fault, 0 = Normal Operation)
Bits
7
6
5
4
3
2
1
0
Table 12. Register 0x08 to Register 0x0D—Fault Configuration Registers
Register Name
Fault Configuration Register 1
Fault Configuration Register 2
Fault Configuration Register 3
Fault Configuration Register 4
Fault Configuration Register 5
Fault Configuration Register 6
Register 0x08 to Register 0x0D allow the user to program the response when each flag is set.
Table 13. Register 0x08 to Register 0x0D—Fault Configuration Register Bit Descriptions
Bits
7
6
[5:4]
3
2
[1:0]
Name
Reserved
Modulation
Address
Light load mode
Reserved
ACSNS
CRC fault
EEPROM unlocked
Name
Timing
Resolve issue
Action
Timing
Resolve issue
Action
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R/W
R
R
R
R
R
Description
Reserved.
Modulation is at its minimum or maximum limit.
The ADD resistor is not correct.
The system is in light load mode.
Reserved.
The ac sense timing or amplitude is not correct. The ac sense
comparator has not tripped for one switching cycle.
The EEPROM contents downloaded are incorrect.
The EEPROM is unlocked.
Address
0x08
0x09
0x0A
0x0B
0x0C
0x0D
Description
This bit specifies when the flag is set.
0 = after debounce.
1 = immediately.
This bit specifies when the part is reenabled after the fault that triggered the flag has been resolved.
0 = reenable after the power supply reenable time set in Register 0x0E[1:0].
1 = remain disabled; power supply must be restarted to reenable.
These bits specify the action that the part takes in response to the flag.
Bit 5
0
0
1
1
Same as Bit 7.
Same as Bit 6.
Same as Bits[5:4].
Bits
[7:4]
[3:0]
[7:4]
[3:0]
[7:4]
[3:0]
[7:4]
[3:0]
[7:4]
[3:0]
[7:4]
[3:0]
Bit 4
0
1
0
1
Rev. 0 | Page 36 of 72
Flag
CS1 fast OCP
CS1 accurate OCP
CS2 accurate OCP
Load OVP (VS2 or VS3)
Local OVP (VS1)
External flag input (FLAGIN)
OTP
UVP
Accurate OrFET reverse voltage
Voltage continuity
Share bus
ACSNS
Action
Ignore flag completely
Disable SR1 and SR2
Disable OrFET
Disable power supply (disable all PWM outputs and OrFET GATE)
Register
0x2E
0x3B
Shutdown Debounce
See Register 0x27 in Table 35
See Register 0x0E in Table 14
See Register 0x0E in Table 14
2 ms
2 ms
100 ms
100 ms
100 ms
100 ms
100 ms
1 ms or 100 ms
100 ms
Action
None
None
None
Programmable
Immediate shutdown
None