ADP1043A Analog Devices, ADP1043A Datasheet - Page 45

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ADP1043A

Manufacturer Part Number
ADP1043A
Description
Digital Controller for Isolated Power Supply Applications
Manufacturer
Analog Devices
Datasheet

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Table 42. Register 0x2E—Modulation Limit
Bits
7
[6:4]
3
2
[1:0]
Table 43. Register 0x2F—OTP Threshold
Bits
[7:0]
Name
Full bridge
Modulation high
limit
Reserved
Pulse skipping
Modulation low
limit
Name
OTP threshold
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Enable this bit when operating in full-bridge mode. This mode distributes the modulation equally
between two PWM outputs instead of one. It affects the modulation high limit and the modulation
low limit settings.
These bits set the maximum allowed modulation that is applied to a PWM output. The value is a
percentage of the switching period.
Bit 6
0
0
0
0
1
1
1
1
Reserved.
Setting this bit enables pulse skipping mode. If the ADP1043A requires a duty cycle lower than the
modulation low limit, pulse skipping is enabled.
These bits set the minimum allowed modulation that is applied to a PWM output. The value is a
percentage of the switching period. If the modulation calculated is lower than this limit, pulse
skipping can be enabled.
Bit 1
0
0
1
1
Description
The OTP threshold value is compared to the RTD ADC reading (Register 0x1A). If the RTD ADC
reading is lower than the threshold set in this register, the OTP flag is set. (The flag is set below the
threshold because using an NTC thermistor causes the reading to decrease as the temperature
increases.) Each LSB typically corresponds to an increased OTP threshold of 3.04 mV. The RTD ADC
range is 0 V to 1.55 V; the OTP threshold is 9.12 mV to 760 mV. There is a hysteresis of 16 mV on the
OTP flag.
Bit 7
0
0
0
1
1
Bit 5
0
0
1
1
0
0
1
1
Bit 6
0
0
0
1
1
Bit 0
0
1
0
1
Bit 4
1
1
1
Rev. 0 | Page 45 of 72
0
0
0
1
0
Limit (%)
Nominal + 12.5%
Nominal + 25%
Nominal + 31.25%
Nominal + 37.5%
Nominal + 43.75%
Nominal + 46.88%
Nominal + 48.44%
Nominal + 50%
Limit (%)
Nominal − 50%
Nominal − 48.44%
Nominal − 46.88%
Nominal − 43.75%
Bit 3
0
0
0
1
1
Bit 2
0
1
1
0
0
Bit 1
1
0
0
0
1
Limit (%) in Full-Bridge Mode
Nominal + 6.25%
Nominal + 12.5%
Nominal + 15.625%
Nominal + 18.75%
Nominal + 21.875%
Nominal + 23.44%
Nominal + 24.22%
Nominal + 25%
Limit (%) in Full-Bridge Mode
Nominal − 25%
Nominal − 24.22%
Nominal − 23.44%
Nominal − 21.875%
Bit 0
1
0
1
1
0
OTP Limit (mV)
9.12
12.16
15.20
756.96
760
ADP1043A

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