ADP1043A Analog Devices, ADP1043A Datasheet - Page 58

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ADP1043A

Manufacturer Part Number
ADP1043A
Description
Digital Controller for Isolated Power Supply Applications
Manufacturer
Analog Devices
Datasheet

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ADP1043A
Table 89. Register 0x5E—Password Lock
Bits
[7:0]
DIGITAL FILTER PROGRAMMING REGISTERS
Table 90. Register 0x5F—Soft Start Digital Filter LF Gain Setting
Bits
[7:2]
[1:0]
Table 91. Register 0x60—Normal Mode Digital Filter LF Gain Setting
Bits
[7:0]
Table 92. Register 0x61—Normal Mode Digital Filter Zero Setting
Bits
[7:0]
Table 93. Register 0x62—Normal Mode Digital Filter Pole Setting
Bits
[7:0]
Name
Password
Name
LF gain setting
Name
Zero setting
Name
Pole location
Name
Reserved
Soft start filter gain
100Hz
R/W
W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
This register determines the low frequency gain of the loop response. Programmable over a
20 dB range. Each LSB corresponds to a 0.3 dB increase. See Figure 37.
Description
This register determines the position of the final 0. See Figure 37.
Description
This register determines the position of the final pole. See Figure 37.
Description
This register contains the 8-bit EEPROM lock password. This password is used to protect the
register contents from being changed. The EEPROM is always locked. When the EEPROM
downloads its contents to the registers, the password is also downloaded. If the user writes the
same password to this register twice, the EEPROM is unlocked and can be updated. To lock the
EEPROM again, the user must write any value other than the password value into this register.
Description
Reserved.
These bits set the gain of the low-pass digital filter that is used during soft start.
Bit 1
0
0
1
1
Figure 37. Digital Filter Programmability
500Hz
Rev. 0 | Page 58 of 72
Bit 0
0
1
0
1
POLE LOCATION RANGE
1kHz
ZERO
Filter Gain
1
2
4
8
POLE
5kHz
10kHz

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