LPC1343FHN33 NXP Semiconductors, LPC1343FHN33 Datasheet - Page 69

The LPC1343FHN33 is a ARM Cortex-M3 based microcontroller for embedded applications featuring a high level of integration and low power consumption

LPC1343FHN33

Manufacturer Part Number
LPC1343FHN33
Description
The LPC1343FHN33 is a ARM Cortex-M3 based microcontroller for embedded applications featuring a high level of integration and low power consumption
Manufacturer
NXP Semiconductors
Datasheet

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15. Revision history
Table 25.
LPC1311_13_42_43
Product data sheet
Document ID
LPC1311_13_42_43 v.4
Modifications:
LPC1311_13_42_43 v.3
LPC1311_13_42_43 v.2
LPC1311_13_42_43 v.1
Revision history
Release date
20110620
20100810
20100506
20091211
Parts LPC1311/01 and LPC1313/01 added (LPC1300L series).
Modifications to the data sheet applying to the LPC1311/01 and LPC1313/01 only:
– Power consumption added in
– Power profiles added to
– SSP1 added for LPC1313FBD48/01.
– BOD forced reset supports four levels (see
– WWDT added for parts LPC1311/01 and LPC1313/01.
– Function DTR added to pin PIO3_0, function DSR added to PIO3_1, function DCD
Parameter V
Typical value for parameter N
PLL output frequency limited to 100 MHz in
Description of RESET and WAKEUP functions updated in
WDT description updated in Section 7.14. The WDT is a 24-bit timer.
Parameter V
Specify 3.0 V  V
and in
Table note for pins USB_DM and USB_DP updated: pads are not 5 V tolerant
and
Updated parameters V
Section 11.7 “ElectroMagnetic Compatibility (EMC)”
Internal pull-up specified for LPC1311/13/42/43 and LPC1311/01 and LPC1313/01 in
Table 3 (Table note
Reflow soldering footprint drawings added in
ADC sampling frequency corrected in
Power-up characterization added
Condition for parameter T
Table note 4
added to PIO3_2, and function RI added to PIO3_3 in
only).
Table
All information provided in this document is subject to legal disclaimers.
Table
4).
hys
OL
20.
of
Rev. 4 — 20 June 2011
Data sheet status
Product data sheet
Product data sheet
Product data sheet
Product data sheet
Table 6
removed for I
for I
DD
1) and
2
 3.6 V for USB pins in
C bus pins: typical value corrected V
OH
updated.
stg
and I
Table 4 (Table note
Section 2
in
2
endu
C-bus pins in
OH
Table 6
Table 7
(Section
added in
for PIO0_7 in
and in
Table 8 (Table note
Change notice Supersedes
-
-
-
-
updated.
and
32-bit ARM Cortex-M3 microcontroller
10.1).
Table 13 “Flash
Table 7
Table 7 (Table note 2
Section
Section
LPC1311/13/42/43
Section
Section
Table
1).
Table
and replaced by parameter I
7.18.2.
added.
7.18.5.1.
10).
13.
9.4.
7.
LPC1311_13_42_43 v.3
LPC1311_13_42_43 v.2
LPC1311_13_42_43 v.1
-
hys
Table 3
7).
Section
characteristics”.
= 0.05V
(LPC1300L series
and
7.19.
© NXP B.V. 2011. All rights reserved.
DD
Table note
in
Table
(Table 3
69 of 73
7.
OL
17)
.

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