ST72344S4 STMicroelectronics, ST72344S4 Datasheet - Page 129

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ST72344S4

Manufacturer Part Number
ST72344S4
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72344S4

Up To 16 Kbytes Program Memory
single voltage extended Flash (XFlash) with readout and write protection, in-circuit and inapplication programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
256 Bytes Data Eeprom With Readout Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55 °C.
Clock Sources
crystal/ceramic resonator oscillators, high-accuracy internal RC oscillator or external clock
5 Power-saving Modes
Slow, Wait, Halt, Auto-wakeup from Halt and Active-halt
16-bit Timer A With
1 input capture, 1 output compares, external clock input, PWM and pulse generator modes
16-bit Timer B With
2 input captures, 2 output compares, PWM and pulse generator modes
ST72344xx ST72345xx
11.5
11.5.1
11.5.2
11.5.3
SCI serial communication interface
Introduction
The serial communications interface (SCI) offers a flexible means of full-duplex data
exchange with external equipment requiring an industry standard NRZ asynchronous serial
data format. The SCI offers a very wide range of baud rates using two baud rate generator
systems.
Main features
General description
The interface is externally connected to another device by three pins (see
SCI bidirectional communication requires a minimum of two pins: Receive Data In (RDI) and
Transmit Data Out (TDO):
Full-duplex, asynchronous communications
NRZ standard format (Mark/Space)
Dual baud rate generator systems
Independently programmable transmit and receive baud rates up to 500K baud
Programmable data word length (8 or 9 bits)
Receive buffer full, Transmit buffer empty and End of Transmission flags
2 receiver wake-up modes:
Muting function for multiprocessor configurations
Separate enable bits for Transmitter and Receiver
4 error detection flags:
5 interrupt sources with flags:
Parity control:
Reduced power consumption mode
SCLK: Transmitter clock output. This pin outputs the transmitter data clock for
synchronous transmission (no clock pulses on start bit and stop bit, and a software
option to send a clock pulse on the last data bit). This can be used to control
Address bit (MSB)
Idle line
Overrun error
Noise error
Frame error
Parity error
Transmit data register empty
Transmission complete
Receive data register full
Idle line received
Overrun error detected
Transmits parity bit
Checks parity of received data byte
Doc ID 12321 Rev 5
On-chip peripherals
Figure
63). Any
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