ST72344S4 STMicroelectronics, ST72344S4 Datasheet - Page 223

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ST72344S4

Manufacturer Part Number
ST72344S4
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72344S4

Up To 16 Kbytes Program Memory
single voltage extended Flash (XFlash) with readout and write protection, in-circuit and inapplication programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
256 Bytes Data Eeprom With Readout Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55 °C.
Clock Sources
crystal/ceramic resonator oscillators, high-accuracy internal RC oscillator or external clock
5 Power-saving Modes
Slow, Wait, Halt, Auto-wakeup from Halt and Active-halt
16-bit Timer A With
1 input capture, 1 output compares, external clock input, PWM and pulse generator modes
16-bit Timer B With
2 input captures, 2 output compares, PWM and pulse generator modes
ST72344xx ST72345xx
Figure 115. RESET pin protection when LVD is enabled
1. The reset network protects the device against parasitic resets.
2. When the LVD is enabled, it is recommended not to connect a pull-up resistor or capacitor. A 10nF pull-
3. In case a capacitive power supply is used, it is recommended to connect a 1M
4. Tips when using the LVD:
5. Please refer to
Figure 116. RESET pin protection when LVD is disabled
1. The reset network protects the device against parasitic resets.
2. Please refer to
EXTERNAL
RESET
- The output of the external reset circuit must have an open-drain output to drive the ST7 reset pad.
- Whatever the reset source is (internal or external), the user must ensure that the level on the RESET pin
- Because the reset circuit is designed to allow the internal reset to be output in the RESET pin, the user
for I
down capacitor is required to filter noise on the reset line.
RESET pin to discharge any residual voltage induced by the capacitive effect of the power supply (this will
add 5µA to the power consumption of the MCU).
1. Check that all recommendations related to the reset circuit have been applied (see notes above)
2. Check that the power supply is properly decoupled (100nF + 10µF close to the MCU). Refer to AN1709
3. The capacitors connected on the RESET pin and also the power supply are key to avoid any startup
- The output of the external reset circuit must have an open-drain output to drive the ST7 reset pad.
- Whatever the reset source is (internal or external), the user must ensure that the level on the RESET pin
- Because the reset circuit is designed to allow the internal reset to be output in the RESET pin, the user
for I
Required
Otherwise the device can be damaged when the ST7 generates an internal reset (LVD or watchdog).
can go below the V
taken into account internally.
must ensure that the current sunk on the RESET pin is less than the absolute maximum value specified
Otherwise the device can be damaged when the ST7 generates an internal reset (LVD or watchdog).
can go below the V
taken into account internally.
must ensure that the current sunk on the RESET pin is less than the absolute maximum value specified
EXTERNAL
and AN2017. If this cannot be done, it is recommended to put a 100nF + 1M
pin.
marginality. In most cases, steps 1 and 2 above are sufficient for a robust solution. Otherwise: replace
10nF pull-down on the RESET pin with a 5µF to 20µF capacitor.”
CIRCUIT
INJ(RESET)
INJ(RESET)
RESET
USER
Required
in
in
Section 12.2.1: Illegal opcode reset
Section 12.2.1: Illegal opcode reset
Table 85 on page
Table 85 on page
0.01 µF
IL
0.01 µF
IL
max. level specified in
max. level specified in
1 MΩ
Optional
(note 3)
Doc ID 12321 Rev 5
201.
201.
V
Section 13.10.1 on page
Section 13.10.1 on page
DD
V
R
DD
ON
for more details on illegal opcode reset conditions.
for more details on illegal opcode reset conditions.
R
Filter
ON
Filter
GENERATOR
PULSE
GENERATOR
PULSE
(1)(2)(3)(4)
(1)
222. Otherwise the reset will not be
222. Otherwise the reset will not be
Electrical characteristics
Ω
Ω
pull-down resistor to the
pull-down on the RESET
WATCHDOG
ILLEGAL OPCODE
WATCHDOG
ILLEGAL OPCODE
LVD RESET
INTERNAL
RESET
INTERNAL
RESET
ST72XXX
ST72XXX
223/247
(2)
(5)

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