ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 134

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ST72561J9-Auto

Manufacturer Part Number
ST72561J9-Auto
Description
8-bit MCU for automotive
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72561J9-Auto

Hdflash Endurance
100 cycles, data retention 20 years at 55 °C
5 Power Saving Modes
halt, auto wake up from halt, active halt, wait and slow
8-bit timer (TIM8)
13.3.5
134/324
Figure 67. Output compare timing diagram, f
One pulse mode
One Pulse mode enables the generation of a pulse when an external event occurs. This
mode is selected via the OPM bit in the CR2 register.
The one pulse mode uses the Input Capture1 function and the Output Compare1 function.
Procedure
To use one pulse mode:
1.
2.
3.
Load the OC1R register with the value corresponding to the length of the pulse (see the
formula in the opposite column).
Select the following in the CR1 register:
Select the following in the CR2 register:
Using the OLVL1 bit, select the level to be applied to the OCMP1 pin after the
pulse.
Using the OLVL2 bit, select the level to be applied to the OCMP1 pin during the
pulse.
Select the edge of the active transition on the ICAP1 pin with the IEDG1 bit (the
ICAP1 pin must be configured as floating input).
Set the OC1E bit, the OCMP1 pin is then dedicated to the Output Compare 1
function.
Set the OPM bit.
Select the timer clock CC[1:0] (see
OUTPUT COMPARE REGISTER i (OCRi)
OUTPUT COMPARE FLAG i (OCFi)
COMPARE REGISTER i LATCH
OCMPi PIN (OLVLi = 1)
COUNTER REGISTER
Doc ID 12370 Rev 8
TIMER CLOCK
f
CPU
CLOCK
Table
CF
TIMER
55).
D0
= f
D1
CPU
D3
/4
D2
D3
D4
ST72561-Auto

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