ST72561J9-Auto STMicroelectronics, ST72561J9-Auto Datasheet - Page 66

• Manufacturer Part Number: ST72561J9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561J9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

Power saving modes
Note:
66/324
1
2
3
4
system is enabled, can generate a Watchdog RESET (see
more details).
Figure 25. HALT timing overview
Figure 26. HALT mode flow-chart
WDGHALT is an option bit. See option byte section for more details.
Peripheral clocked with an external clock source can still be active.
Only some specific interrupts can exit the MCU from HALT mode (such as external
interrupt). Refer to
Before servicing an interrupt, the CC register is pushed on the stack. The I[1:0] bits of the
CC register are set to the current software priority level of the interrupt routine and
recovered when the CC register is popped.
Table 16
[MCCSR.OIE=0]
INSTRUCTION
RUN
(AWUCSR.AWUEN=0)
for more details.
HALT INSTRUCTION
N
WATCHDOG
WDGHALT
(MCCSR.OIE=0)
Doc ID 12370 Rev 8
HALT
RESET
1
INTERRUPT
HALT
Y
1)
256 OR 4096 CPU
CYCLE DELAY
INTERRUPT
ENABLE
3)
256 OR 4096 CPU CLOCK
RESET
OR SERVICE INTERRUPT
0
FETCH RESET VECTOR
OR
OSCILLATOR
PERIPHERALS
CPU
OSCILLATOR
PERIPHERALS
CPU
OSCILLATOR
PERIPHERALS
CPU
I[1:0] BITS
I[1:0] BITS
I[1:0] BITS
N
CYCLE
RESET
WATCHDOG
Y
VECTOR
FETCH
DELAY
DISABLE
RUN
2)
XX
XX
OFF
OFF
OFF
OFF
Section 22.1: Introduction
ON
ON
ON
ON
ON
10
4)
4)
ST72561-Auto
for