ST10F269Z2 STMicroelectronics, ST10F269Z2 Datasheet - Page 141

• Manufacturer Part Number: ST10F269Z2
• Description: 16-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST10F269Z2

• Single Voltage Supply: 5V ±10% (EMBEDDED REGULATOR FOR 2.7 or 3.3 V CORE SUPPLY).
• Temperature Ranges: -40 +125 °C / -40 to 85 °C

ST10F269
Notes: 1. ST10F269 pins are equipped with low-noise output drivers which significantly improve the device’s EMI performance. These
I
PD2
Symbol
11. Typical I
12. Partially tested, guaranteed by design characterization using 22pF loading capacitors on crystal pins.
low-noise drivers deliver their maximum current only until the respective target output level is reached. After this, the output current
is reduced. This results in increased impedance of the driver, which attenuates electrical noise from the connected PCB tracks. The
current specified in column “Test Conditions” is delivered in any cases.
2. This specification is not valid for outputs which are switched to open drain mode. In this case the respective output will float and the
voltage results from the external circuitry.
3. Partially tested, guaranteed by design characterization.
4. Overload conditions occur if the standard operating conditions are exceeded, i.e. the voltage on any pin exceeds the specified
range (i.e. V
supply voltage must remain within the specified limits.
5. This specification is only valid during Reset, or during Hold-mode or Adapt-mode. Port 6 pins are only affected if they are used for
CS output and if their open drain function is not enabled.
6. The maximum current may be drawn while the respective signal line remains inactive.
7. The minimum current must be drawn in order to drive the respective signal line active.
8. The power supply current is a function of the operating frequency. This dependency is illustrated in Figure 65 and Figure 65. These
parameters are tested at V
chip is configured with a demultiplexed 16-bit bus, direct clock drive, 5 chip select lines and 2 segment address lines, EA pin is low
during reset. After reset, PORT 0 is driven with the value ‘00CCh’ that produces infinite execution of NOP instruction with 15
wait-states, R/W delay, memory tristate wait state, normal ALE. Peripherals are not activated.
9. Idle mode supply current is a function of the operating frequency. This dependency is illustrated in the Figure 65. These
parameters are tested at V
10. This parameter value includes leakage currents. With all inputs (including pins configured as inputs) at 0V to 0.1V or at
V
DD
– 0.1V to V
Power-down mode supply current (Real time
clock enabled, oscillator enabled)
PD
OV
value is 5µA @ T
> V
DD
, V
DD
REF
+0.5V or V
= 0V, all outputs (including pins configured as outputs) disconnected.
DD
DD
max and 40MHz (or 32MHz) CPU clock with all outputs disconnected and all inputs at VIL or VIH. The
max and 40MHz (or 32MHz) CPU clock with all outputs disconnected and all inputs at V
A
OV
=25°C, 20µA @ T
Parameter
< -0.5V). The absolute sum of input overload currents on all port pins may not exceed 50mA. The
A
=85°C and 60µA @ T
10
12
21 - ELECTRICAL CHARACTERISTICS
f
OSC
Conditions
A
V
T
=125°C.
DD
A
Test
= 25MHz
= 55°C
= 5.5V
Min.
–
2 + f
Max.
OSC
/ 4
IL
or V
141/184
IH
Unit
.
mA