ST10F269Z2 STMicroelectronics, ST10F269Z2 Datasheet - Page 182

no-image

ST10F269Z2

Manufacturer Part Number
ST10F269Z2
Description
16-bit MCU
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST10F269Z2

Single Voltage Supply
5V ±10% (EMBEDDED REGULATOR FOR 2.7 or 3.3 V CORE SUPPLY).
Temperature Ranges
-40 +125 °C / -40 to 85 °C

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST10F269Z2-Q3
Manufacturer:
ST
0
Part Number:
ST10F269Z2-Q3
Manufacturer:
ST
Quantity:
20 000
Part Number:
ST10F269Z203
Manufacturer:
ST
0
Part Number:
ST10F269Z2Q3
Manufacturer:
INFINEON
Quantity:
1 443
Part Number:
ST10F269Z2Q3
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
ST10F269Z2Q3
Manufacturer:
ST
Quantity:
20 000
Part Number:
ST10F269Z2Q6
Manufacturer:
ST
Quantity:
201
Part Number:
ST10F269Z2Q6
Manufacturer:
ST
Quantity:
745
Part Number:
ST10F269Z2Q6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
ST10F269Z2Q6
Manufacturer:
ST
Quantity:
2
Part Number:
ST10F269Z2Q6
Manufacturer:
ST
Quantity:
20 000
Part Number:
ST10F269Z2T3
Manufacturer:
LITTLEFUSE
Quantity:
1 000
2 - FUNCTIONAL PROBLEMS
2.2 - MAC.9 - CoCMP Instruction Inverted Operands
The ST10 Family Programming Manual describes the CoCMP instruction as: subtracts a 40-bit signed
operand from th 40-bit accumulator content (acc - op2\op1), and updates the N, Z and C flags in the MSW
register, leaving the accumulator unchanged. On the device the reverse operation (op2\op1 - acc) has
been implemented in the Mac Unit. Therefore, the N and C flags are set according to the reverse opera-
tion (Z flag is not affected).
Workaround:
Change interpretation of the N and C flags in the MSW register.
Example:
MOV
MOV
MOV
CoLOAD
CoCMP
Here the content of MSW is 0500h, i.e. C = 1, Z = 0 and N = 1.
To test if the Accumulator was greater than or equal the compared value, the "normal" test, according to
the description in the ST10 Programming Manual, would be:
JNB
With the implementation, this test does not provide the expected result.
To obtain the correct comparison, use instead:
JB
2.3 - MAC.10 - E Flag Evaluation for CoSHR and CoASHR Instructions when Saturation Mode is
Enabled
The Logical and the Arithmetic Right Shift instructions (CoSHR/CoASHR) are specififed not to be affected
by the saturation mode (MS bit of the MCW register): the shift operation is always made on the 40 bits of
the accumulator. The result shifted in the accumulator is never saturated. Only when the saturation mode
is enabled, the evaluation of the E Flag (in the MSW register) is erroneous.
Comment to the example:
In this example below (Table 1), the E Flag is kept cleared however MAE is used: bit 0 of MAE has been
shifted into bit 15 of MAH. The MAE part has been used and it contents significant bits but the E Flag has
not been set.
The content of the flags is given after the execution of the instruction.
Table 1 : MAC.10 Example
Workaround:
If the MAE flag is used, the saturation mode must be disabled before running Logical and/or Arihmetic
Right Shift instructions and re-enable just after.
182/184
MOV
CoLOAD
NOP
MOV
NOP
CoSHR
MS Bit is Set, Saturation Mode is Enabled
R5, #5555h
R5, R5
MSW, #007Fh
#1
Code
R12, #07h
R13, #06h
R14, #0
R14, R12
R14, R13
MSW.10, Greater
MSW.10, Greater
--
00
00
7F
7F
3F
Accumulator Value
; Accumulator = 70000h
; Compares 70000h to 60000h
; If C flag cleared, then greater than or equal
; C flag set: 60000h < 70000h (60000h-70000h implemented)
; i.e. the accumulator is greater than or equal compared value
----
5555
5555
5555
5555
AAAA AAAA
(Hexa.)
----
5555
5555
5555
5555
SL
0
0
0
0
0
-
Status of Flags After Instruction Execution
0*
E
0
0
0
0
-
SV
0
0
0
0
0
-
C
0
0
0
0
0
-
Z
0
0
0
0
0
-
N
0
0
0
0
0
-
ST10F269
-
Right
Right
Right
Right
*E is wrong
Remark

Related parts for ST10F269Z2