TMP86xy09NG Toshiba, TMP86xy09NG Datasheet - Page 121

• Manufacturer Part Number: TMP86xy09NG
• Manufacturer: Toshiba

Specifications of TMP86xy09NG

• Package: SDIP32
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 8/16
• Ram Size: 256/512
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: -
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 6
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 1
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: √
• Dual Clock: √
• Clock Gear: -
• Number Of I/o Ports: 26
• Power Supply (v): 2.7 to 5.5

11. Serial Expansion Interface (SEI)
11.1 Features
via full-duplex synchronous communication protocols. The TMP86C809NG contain one channel of SEI.
and
SS
SEI is one of the serial interfaces incorporated in the TMP86C809NG. It allows connection to peripheral devices
SEI is connected with an external device through SCLK, MOSI, MISO and the terminal
Note: Mode fault detect function is not supported. Make sure to set SECR<MODE> bit to "1" for disabling the Mode fault
pins, set the each Port Output Latch to “1”.
SS
• The master outputs the shift clock for only a data transfer period.
• The clock polarity and phase are programmable.
• The data is 8 bits long.
• MSB or LSB-first can be selected.
• The programmable data and clock timing of SEI can be connected to almost all synchronous serial peripheral
• The transfer rate can be selected from the following four (master only):
• The error detection circuit supports the following functions:
pins respectively are shared with P02, P03, P04 and P05. When using these ports as SCLK, MOSI, MISO, or
detection.
devices. Refer to “" 11.5 SEI Transfer Formats "”.
4 Mbps, 2 Mbps, 1 Mbps, or 250 kbps (when operating at 16 MHz)
a. Write collision detection: When the shift register is accessed for write during transfer
b. Overflow detection: When new data is received while the transfer-finished flag is set (slave only)
register
register
control
status
SEI
SEI
Figure 11-1 SEI (Serial Extended Interface)
SEE
MODE
MSTR
CPHA
CPOL
BOS
SER
WCOL
SOVF
SEF
4, 8, 16, 64 divide
Clock control unit
Internal SEI clock
SEI control unit
Clock selection
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SEI interrupt
(INTSEI1)
MISO
Bit order selection
SEI data register
Port control unit
Read buffer
Shift register
MOSI SCLK SS
Data
Address
SS
. SCLK, MOSI, MISO,
TMP86C809NG