TMP86xy09NG Toshiba, TMP86xy09NG Datasheet - Page 58

• Manufacturer Part Number: TMP86xy09NG
• Manufacturer: Toshiba

Specifications of TMP86xy09NG

• Package: SDIP32
• Rom Types (m=mask,p=otp,f=flash): M/F
• Rom Size: 8/16
• Ram Size: 256/512
• Driver Led: 8
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: -
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 6
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 1
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: √
• Dual Clock: √
• Clock Gear: -
• Number Of I/o Ports: 26
• Power Supply (v): 2.7 to 5.5

5.1 P0 (P07 to P00) Port (High Current)
5.1 P0 (P07 to P00) Port (High Current)
P0OUTCR
Read only
(000BH)
(000CH)
(0000H)
P0PRD
UART and 16-bit timer counter input/output. When using this port as an input port or for external interrupt input,
SEI serial interface input/output, or UART input/output, set the output latch to 1. When using this port as an output
port, the output latch data (P0DR) is output to the P0 port.
respectively.
P0OUTCR register.
1.
The P0 port has independent data input registers. To inspect the output latch status, read the P0DR register. To
inspect the pin status, read the P0PRD register.
P0DR
R/W
The P0 port is an 8-bit input/output port shared with external interrupt input, SEI serial interface input/output, and
When reset, the output latch (P0DR) and the push-pull control register (P0OUTCR) are initialized to 1 and 0,
The P0 port allows its output circuit to be selected between N-channel open-drain output or push-pull output by the
When using this port as an input port, set the P0OUTCR register's corresponding bit to 0 after setting the P0DR to
P0OUTCR
INT4
TC1
P07
P07
7
7
Data input (P0PRD)
Data output (P0DR)
Data input (P0DR)
P0 UTCRi input
Control output
Control input
INT3
PPG
P06
P06
P0 UTCRi
6
6
Controls P0 port input/output
(specified bitwise)
ST P
UTEN
P05
P05
SS
5
5
MISO
P04
P04
4
4
utput latch
utput latch
D
D
Figure 5-2 P0 Port
Q
Q
MOS
P03
P03
3
3
0: Nch open-drain output
1: Push-pull output
Page 48
SCLK
P02
P02
2
2
RxD
P01
P01
1
1
P00
TxD
P00
0
0
(Initial value: 1111 1111)
Note: i = 7
P0i
to
0
TMP86C809NG
R/W