TMP86xy49UG/F/NG Toshiba, TMP86xy49UG/F/NG Datasheet - Page 215

• Manufacturer Part Number: TMP86xy49UG/F/NG
• Manufacturer: Toshiba

Specifications of TMP86xy49UG/F/NG

• Package: LQFP64/QFP64/SDIP64
• Rom Types (m=mask,p=otp,f=flash): M/P/F
• Rom Size: 16/32/60
• Ram Size: 512/1K/2K
• Driver Led: 13
• Driver Lcd: -
• Spi/sio Channels: 2
• Uart/sio Channels: 2
• I2c/sio Channels: 1
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 4
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 56
• Power Supply (v): 4.5 to 5.5

16.5 I2C Bus Control
Serial Bus Interface Status Register A
I
Serial Bus Interface Control Register B
Serial Bus Interface Status Register B
2
SBISRA
(0F90H)
I2CAR
(0F92H)
SBICRB
(0F93H)
SBISRB
(0F93H)
C bus Address Register
Note 1: I2CAR is write-only register, which cannot be used with any of read-modify-write instruction such as bit manipulation, etc.
Note 2: Do not set I2CAR to "00H" to avoid the incorrect response of acknowledgment in slave mode. ( If "00H" is set to I2CAR as
Note 1: Switch a mode to port after confirming that the bus is free.
Note 2: Switch a mode to I
Note 3: SBICRB has write-only register and must not be used with any of read-modify-write instructions such as bit manipulation,
Note 4: When the SWRST (Bit1, 0 in SBICRB) is written to "10", "01" in I
SWRMON
SWRST1
SWRST0
SBIM
MST
TRX
ALS
PIN
SA
BB
the Slave Address and a START Byte "01H" in I
etc.
SBICRA, I2CAR, SBISRA and SBISRB registers are initialized and the bits of SBICRB except the SBIM (Bit3, 2 in SBI-
CRB) are also initialized.
MST
MST
SA6
7
7
7
7
Slave address selection
Address recognition mode spec-
ification
Master/slave selection
Start/stop generation
Cancel interrupt service request
Serial bus interface operating
mode selection
Software reset start bit
Software reset monitor
Transmitter/receiver selection
TRX
TRX
SA5
6
6
6
2
6
C bus mode after confiming that the port is high level.
SA4
BB
BB
5
5
5
5
Slave address
Software reset starts by first writing "10" and next writing "01"
SA3
PIN
PIN
4
4
4
4
00:
01:
10:
11:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
Page 198
Slave address recognition
Non slave address recognition
Slave
Master
Receiver
Transmitter
Generate a stop condition when MST, TRX and PIN are "1"
Generate a start condition when MST, TRX and PIN are "1"
– (Can not clear this bit by a software)
Cancel interrupt service request
Port mode (Serial bus interface output disable)
Reserved
I
Reserved
During software reset
– (Initial value)
2
2
C bus mode
C bus standard is recived, the device detects slave address match.)
SA2
3
AL
3
3
3
SBIM
SA1
AAS
2
2
2
2
2
C bus mode, software reset is occurred. In this case, the
SWRST1
SA0
AD0
1
1
1
1
SWRMON
SWRST0
ALS
LRB
0
0
0
0
(Initial value: 0000 0000)
(Initial value: 0001 0000)
(Initial value: 0001 0000)
(Initial value: **** ***1)
TMP86PM49UG
Read
Write
Write
only
only
only