FAN4803 Fairchild Semiconductor, FAN4803 Datasheet - Page 8

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FAN4803

Manufacturer Part Number
FAN4803
Description
To minimize standby power consumption, a proprietary green-mode function provides off-time modulation to continuously decrease the switching frequency at light-load conditions
Manufacturer
Fairchild Semiconductor
Datasheets

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FAN4803
Subsequently the PFC gate drive is initiated, eliminating the
necessary dead time needed for the DCM mode. This forces
the output to run away until the V
PFC. This situation is corrected by adding an offset voltage
to the current sense signal, which forces the duty cycle to
zero at light loads. This offset prevents the PFC from operat-
ing in the DCM and forces pulse-skipping from CCM to no-
duty, avoiding DMC operation. External filtering to the cur-
rent sense signal helps to smooth out the sense signal,
expanding the operating range slightly into the DCM range,
but this should be done carefully, as this filtering also
reduces the bandwidth of the signal feeding the pulse-by-
pulse current limit signal. Figure 9 displays a typical circuit
for adding offset to I
PFC Start-Up and Soft Start
During steady state operation VEAO draws 35µA. At start-up
the internal current mirror which sinks this current is defeated
until V
V
modulation V
PFC output. When selecting external compensation compo-
nents and V
from reaching 6V prior to V
sequence. This will guarantee that the PFC stage will enter
soft-start. Once V
sink is enabled. VEAO compensation components are then
discharged by way of the 35µA current sink until the steady
state operating point is reached. See Figure 8.
PFC Soft Recovery Following V
The FAN4803 assumes that V
that is proportional to the PFC output voltage. Once that
source reaches 16.2V the internal current sink tied to the
VEAO pin is disabled just as in the soft start turn-on
8
CC
V BOOST
V EAO
at the time that the IC is enabled. With leading edge
V OUT
V CC
CC
0
0
0
0
reaches 12V. This forces the PFC error voltage to
CC
CC
supply circuits VEAO must not be prevented
on the VEAO pin forces zero duty on the
CC
Figure 8. PFC Soft Start
SENSE
reaches 12V the 35µA VEAO current
200ms/Div.
CC
at light loads.
CC
reaching 12V in the turn-on
is generated from a source
CC
OVP shuts down the
CC
OVP
10V/div.
10V/div.
10V/div.
200V/div.
sequence. Once disabled, the VEAO pin charges HIGH by
way of the external components until the PFC duty cycle
goes to zero, disabling the PFC. The V
the V
sink and discharging the VEAO compensation components
until the steady state operating point is reached. It should be
noted that, as shown in Figure 8, once the VEAO pin exceeds
6.5V, the internal ramp is defeated. Because of this, an exter-
nal Zener can be installed to reduce the maximum voltage to
which the VEAO pin may rise in a shutdown condition.
Clamping the VEAO pin externally to 7.4V will reduce the
time required for the VEAO pin to recover to its steady state
value.
UVLO
Once V
The UVLO threshold is 9.1V providing 2.9V of hysteresis.
Generating V
An internal clamp limits overvoltage to V
circuit ensures that the V
will function properly over tolerance and temperature while
protecting the part from voltage transients. This circuit
allows the FAN4803 to deliver 15V nominal gate drive at
PWM OUT and PFC OUT, sufficient to drive low-cost
IGBTs.
It is important to limit the current through the Zener to avoid
overheating or destroying it. This can be done with a single
resistor in series with the V
of typically 14V to 18V. The resistor value must be chosen
to meet the operating current requirement of the FAN4803
itself (4.0mA max) plus the current required by the two gate
driver outputs.
GATE
V CC
RTN
PFC
Figure 9. I
CC
0.01 F
C23
CC
discharges below 16.2V, enabling the VEAO current
(see Figure 12)
reaches 12V both the PFC and PWM are enabled.
1N4148
CR16
SENSE
20k
CC
R29
Offset for Light Load Conditions
C16
1 F
CC
CC
OVP circuitry of the FAN4803
10k
R19
pin, returned to a bias supply
I SENSE
20k
R28
PRODUCT SPECIFICATION
CC
0.0082 F
CC
C5
REV. 1.2.3 11/2/04
OVP resets once
. This clamp
1k
R4
to BR1 -Ve
0.15
3W
R3

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