FAN21SV06 Fairchild Semiconductor, FAN21SV06 Datasheet
FAN21SV06
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FAN21SV06 Summary of contents
Page 1
... The FAN21SV06 can be configured to drive multiple slave devices OR synchronize to an external system clock. In slave mode, FAN21SV06 may be set free-running in the absence of a master clock signal. External frequency, and current-limit features allow for design optimization and flexibility ...
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... Block Diagram VIN_Reg Reg 5V_Reg ILIM Int ref COMP Error Amplifier REF CLK OSC RAMP EN GEN RAMP © 2006 Fairchild Semiconductor Corporation FAN21SV06 Rev. 1.0.1 VIN Boot Diode 5V_Reg VIN_Reg C5 RAMP PWM + DRIVER EN ILIM AGND COMP Figure 1. Typical Application, Master ...
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... Ramp Amplitude. A resistor (R 25 RAMP amplitude and also provides voltage feedforward functionality. © 2006 Fairchild Semiconductor Corporation FAN21SV06 Rev. 1.0.1 BOOT ) from this pin to AGND can be used to program the current- ILIM ) connected from this pin to VIN sets the internal ramp RAMP ...
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... Total Power Dissipation in the package Note: 1. Typical thermal resistance when mounted on a four-layer, two-ounce PCB, as shown in Figure 37. Actual results are dependent upon mounting method and surface related to the design. © 2006 Fairchild Semiconductor Corporation FAN21SV06 Rev. 1.0.1 Conditions Conditions VIN to PGND VIN_Reg to AGND FAN21SV06MX FAN21SV06EMX ...
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... Output Voltage Swing (V ) COMP Output Current, Sourcing Output Current, Sinking FB Bias Current Note: 2. Specifications guaranteed by design and characterization; not production tested. © 2006 Fairchild Semiconductor Corporation FAN21SV06 Rev. 1.0.1 Conditions V =12V, 5V_Reg open, CLK open =500KHz, No Load SW EN=High, 5V_Reg open, CLK open, f ...
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... Over-Temperature Hysteresis Over-Voltage Threshold Under-Voltage Shutdown Fault-Discharge Threshold Fault-Discharge Hysteresis Note: 3. Delay times are not tested in production. Guaranteed by design. © 2006 Fairchild Semiconductor Corporation FAN21SV06 Rev. 1.0.1 (Continued) Conditions VIN_Reg >6.5V Auto-Restart Mode, VIN_Reg>6.5V FB < Consecutive Clock Cycles REF FB > Consecutive Clock Cycles ...
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... Normalized 1500 1200 900 600 300 Figure 6. Frequency vs. R 1.60 1.40 1.20 1.00 0.80 0.60 -50 0 Temperature ( Figure 8. R vs. Temperature, Normalized DS (5V_Reg=V © 2006 Fairchild Semiconductor Corporation FAN21SV06 Rev. 1.0.1 1.20 1.10 1.00 0.90 0.80 50 100 150 - vs. Temperature, Figure 5. Reference Bias Current (I FB 1.02 1.01 1.00 0.99 0.98 -50 80 100 120 140 (K (Master) Figure 7 ...
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... Application Circuit Figure 10. Single-Supply Application Circuit: 1.8V +5V 2.2u X5R V OUT 2.49K 62 2.49K 4.7n 4.7n 200K 4.99K 4.7n Figure 11. Dual-Supply Application Circuit : 1.2V © 2006 Fairchild Semiconductor Corporation FAN21SV06 Rev. 1.0.1 FAN21SV06 5V_Reg 15 10K PGOOD 13 2 CLK 24 COMP 20 25 56p ILIM 30.1K AGND 16 OUT 8 , 500KHz, Master ...
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... Room Tempr - 3.3V Output, 500Khz Load (A) Figure 16. Peak Case Temp over MOSFET Locations 3.3V Output, 12V and 24V Input (500KHz) © 2006 Fairchild Semiconductor Corporation FAN21SV06 Rev. 1.0.1 95 1.8V_Eff 8-24V_300Khz 12V 75 16V 20V 24V vs. Load IN 0 ...
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... Typical operating characteristics using the circuit shown in Figure 10 OUT CLK PGood Figure 18. CLK and V V OUT SW Figure 20. Startup on Pre-Bias Figure 22. Shutdown, 1A Load © 2006 Fairchild Semiconductor Corporation FAN21SV06 Rev. 1.0.1 (Continued Startup Figure 19. Transient Response, 3-6A Load OUT V OUT CLK EN PGood Figure 23. Slave (500KHz Free-Run to 600KHz 10 =12V, unless otherwise specified ...
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... Figure 26 Efficiency 300KHz OUT (Circuit Values Change Load (A) Figure 28. 1.8 V Efficiency Over f OUT (Circuit Values Change) © 2006 Fairchild Semiconductor Corporation FAN21SV06 Rev. 1.0.1 (Continued) 95 1.8V_Eff 8-24V_600Khz 12V 75 16V 20V 24V Efficiency 600KHz 3 2 ...
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... Fairchild Semiconductor Corporation FAN21SV06 Rev. 1.0.1 Soft-Start FAN21SV06 uses an internal digital soft-start circuit to slowly ramp up the output voltage and limit inrush current during startup. When 5V_Reg is in regulation and EN is high, the circuit releases SS and enables the PWM regulator. Soft-start time is a function of switching frequency (number of clock cycles) ...
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... After a fault, EN pin is discharged with 1µA current pull down to a 1.1V threshold before the internal 800k pull up is restored. A new soft-start cycle begins when EN charges above 1.35V. Depending on the external circuit, the FAN21SV06 can be configured to remain latched off or automatically restart after a fault, as listed in Table 1. Table 1. Fault / Restart Configurations ...
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... RAMP Setting the Current Limit There are two levels of current-limit thresholds in FAN21SV06. The first level of protection is through an internal default limit set at the factory to provide cycle– by-cycle current limit and prevent output current beyond normal usage levels. The second level of protection is a flexible one to be set externally by the user ...
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... Since the synchronizing circuit utilizes a narrow reset employed by the pulse, the actual phase delay is slightly more than 180 The FAN21SV06 is not intended for use in single-output, multi-phase regulator applications. PCB Layout Good PCB layout and careful attention to temperature rise is essential for reliable operation of the regulator. ...
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... Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2006 Fairchild Semiconductor Corporation FAN21SV06 Rev. 1.0.1 2X RECOMMENDED LAND PATTERN ALL VALUES TYPICAL EXCEPT WHERE NOTED OPTIONAL LEAD DESIGN (LEADS & ...
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... Fairchild Semiconductor Corporation FAN21SV06 Rev. 1.0.1 17 www.fairchildsemi.com ...