FAN7389 Fairchild Semiconductor, FAN7389 Datasheet - Page 13
![no-image](/images/manufacturer_photos/0/2/252/fairchild_semiconductor_sml.jpg)
FAN7389
Manufacturer Part Number
FAN7389
Description
The FAN7389 is a monolithic three-phase half-bridge gate-drive IC designed for high-voltage, high-speed driving MOSFETs and IGBTs operating up to +600V
Manufacturer
Fairchild Semiconductor
Datasheet
1.FAN7389.pdf
(17 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FAN73892
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
Part Number:
FAN73892M
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
Company:
Part Number:
FAN73892MX
Manufacturer:
IR
Quantity:
22 100
Part Number:
FAN73892MX
Manufacturer:
AP60SA380DH
Quantity:
20 000
Company:
Part Number:
FAN7389MX
Manufacturer:
FSC
Quantity:
6 700
© 2010 Fairchild Semiconductor Corporation
FAN7389 • Rev. 1.0.1
Applications Information
1. Dead Time
Dead time is automatically inserted whenever the dead
time of the external two input signals (between HINx
and LINx signals) is shorter than internal fixed dead
times (DT1 and DT2). Otherwise, external dead times
larger than internal dead times are not modified by the
gate driver and internal dead-time waveform definition is
shown in Figure 37.
2. Protection Function
2.1 Fault Out (
The high- and low-side drivers include under-voltage
lockout (UVLO) protection circuitry that monitors the
supply voltage for V
designed to prevent malfunction when V
lower than the specified threshold voltage. Also, the
UVLO hysteresis prevents chattering during power-
supply transitions. Moreover, the fault signal (
to LOW state to operate reliably during power-on
events, when the power supply (V
under-voltage lockout high threshold voltage for the
circuit (during t
activated; shown Figure 38.
HOx
LOx
HINx
LINx
Figure 38. Waveforms for Under-Voltage Lockout
Figure 37. Internal Dead-Time Definitions
50%
1
FO
DT1
~ t
50%
) and Under-Voltage Lockout
2
). The UVLO circuit is not otherwise
DD
50%
and V
BS
independently. It can be
DD
) is below the
50%
DD
DT2
and V
50%
FO
) goes
50%
BS
are
13
2.2 Shoot-Through Protection
The shoot-through protection circuitry prevents both
high- and low-side switches from conducting at the
same time, as shown Figure 39.
2.3 Enable Input
When the EN pin is in HIGH state, the gate driver
operates normally. When a condition occurs that should
shut down the gate driver, the EN pin should be LOW.
The enable circuitry has an input filter; the minimum
input duration is specified by t
Figure 40. Output Enable Timing Waveform
Figure 39. Shoot-Through Protection
FLT,IN
(typically 250ns).
www.fairchildsemi.com