FCM8201 Fairchild Semiconductor, FCM8201 Datasheet - Page 12

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FCM8201

Manufacturer Part Number
FCM8201
Description
FCM8201 is a three-phase sinusoidal brushless DC (BLDC) motor controller
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2011 Fairchild Semiconductor Corporation
FCM8201 • Rev. 1.0.2
Functional Description
Power Management and Regulator
FCM8201 can be operated in a wide input voltage (V
range from 10V to 15V. The VOUT pin is the output
terminal of an internal voltage regulator. The typical
output voltage ranges between 5.0V and 5.2V. To
stabilize the V
connected closely between this terminal and the ground.
If the V
FCM8201 shuts down and all the internal registers are
reset.
Clock Generator
FCM8201 comes with a programmable oscillator. By
determining an externally added resistor R_CLK, the
system clock can be programmed from 960KHz to
1920KHz. The switching frequency of the PWM signal is
equal to 1/64 (divided by ÷ 64) of the system clock.
Therefore, when the system clock is configured as
960KHz, PWM is 960KHz / 64=15KHz. Similarly, if a
20KHz PWM is intended, the system clock has to be set
as 1.28MHz.
PWM Commutation
FCM8201 supports both square-wave and sine-wave
PWM for the BLDC motor control. The controller comes
with the hall-sensor design used to align the rotor
position of the motor. For the Square-Wave PWM Mode,
the PWM output commutation (PWM-PWM and PWM-
ON) is shown at Table 1 and Table 2. The Square-Wave
PWM Modes can be selected by setting an internal
control register through the SPI interface. The default
value of PWM-PWM commutation is shown in Table 1.
Table 1. Square Wave PWM-PWM Commutation
CW
X
X
1
1
1
1
1
1
0
0
0
0
0
0
PP
Hall
000
111
001
011
010
110
100
101
101
100
110
010
011
001
voltage is lower than the 8V threshold,
OUT
circuit, add an external capacitor
Hall
0
7
1
3
2
6
4
5
5
4
6
2
3
1
U-V-W
P-0-0
0-0-P
0-0-P
0-P-0
0-P-0
P-0-0
0-0-P
0-0-P
P-0-0
P-0-0
0-P-0
0-P-0
0-0-0
0-0-0
Pb-1-0
0-1-Pb
1-0-Pb
1-Pb-0
0-Pb-1
Pb-0-1
1-0-Pb
0-1-Pb
Pb-1-0
Pb-0-1
0-Pb-1
1-Pb-0
X-Y-Z
0-0-0
0-0-0
PP
)
12
Table 2. Square Wave PWM-ON Commutation
Note:
1.
HALL Signals Input
FCM8201 provides a 3~6µs debounce time for each
Hall signal input to reduce the glitch of the Hall signals.
When the transition of the Hall signal is slow, a glitch
might be produced and an error follow. Through a built-
in Hall signal regulation circuit, FCM8201 minimizes the
risks of glitches and related errors. This function can be
enabled or disabled through a control register via the
SPI interface.
The Hall signal’s polarity can be configured by setting
the levels of HA_INV, HB_INV, and HC_INV. For
example, if HA_INV=1, an internal Hall-a signal is the
inverse of the HA pin. Otherwise, the internal Hall-a
signal is the same as the signal on the HA pin.
PWM Duty Cycle and Operation
The PWM duty is proportional to the voltage levels on
the OPO pin and DUTY pin. A FREE/nST pin is utilized
to enable the PWM signals. When FREE/nST pin is set
as logic HIGH, the PWM state is in free mode and all
PWM outputs (U, V, W, X, Y, Z pins) are logic LOW.
Once the FREE/nST pin goes logic LOW, the FCM8201
starts operating the PWM. FCM8201 supports various
PWM operation modes to fit different application needs.
The detailed description is shown in the Table 6 SPI
Register Table.
CW
X
x
1
1
1
1
1
1
0
0
0
0
0
0
P=PWM, Pb=PWM inverse.
Hall
000
111
001
011
010
110
100
101
101
100
110
010
011
001
Hall
0
7
1
3
2
6
4
5
5
4
6
2
3
1
U-V-W
1-Pb-0
Pb-0-1
0-1-Pb
0-Pb-1
1-0-Pb
Pb-1-0
0-0-P
0-P-0
P-0-0
0-0-P
P-0-0
0-P-0
0-0-0
0-0-0
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0-1-Pb
1-Pb-0
Pb-0-1
1-0-Pb
Pb-1-0
0-Pb-1
X-Y-Z
0-P-0
P-0-0
0-0-P
0-P-0
0-0-P
P-0-0
0-0-0
0-0-0

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