FCM8201 Fairchild Semiconductor, FCM8201 Datasheet - Page 16

• Manufacturer Part Number: FCM8201
• Description: FCM8201 is a three-phase sinusoidal brushless DC (BLDC) motor controller
• Manufacturer: Fairchild Semiconductor

© 2011 Fairchild Semiconductor Corporation
FCM8201 • Rev. 1.0.2
Table 6. SPI Register Table (Read/Write)
CNTL_REG: System Control Register
PWM_REG: PWM Control Register
Addr. Name Type
Addr. Name Type
0x00 CNTL
0x01 PWM
Reset
Reset
b[6:4] OC_TMR[2:0]
b[5:4]
W/R
W/R
b7
b3
b2
b1
b0
b7
b3
b2
b1
b0
SYNCOFF
EXT_SYN
SEQ_TBL
FREE/nST
TMR_CLR
TMR_CLR
DT[1:0]
PMOD
LPWM
PMOD
DT_EA
IP_EA
B7
CW
0
B7
0
PWM Mode Select
0=
1=
Soft Switching Dead Time Setting
00=2.5µs, 01=2.0µs, 10=4.0µs, 11=3.5µs
Square Wave Sequencer Table Select
Synchronous Rectifier (SR) Disable
0=
External Synchronous Rectifier Configure
0=
1=
In this selection, the OC_TMR[2:0] bits of CNTL_REG can’t be set to 0, too
OC_TMR pin: HIGH=SR enable, LOW=SR disable
Low-Side Minimum PWM Output Enable. This function is working only on
square wave PWM driving
0=
1=
OC_TMR2 OC_TMR1
OC Timer Clear
1=OC timer clear, 0=OC time is normal function
Overload Current Protection Timer Configuration
000=OC timer configure by OC_TMR pin
001=OC timer configure to 2^18 ÷ f
010=OC timer configure to 2^19 ÷ f
011=OC timer configure to 2^20 ÷ f
100=OC timer configure to 2^21 ÷ f
101=OC timer configure to 2^22 ÷ f
110=OC timer configure to 2^23 ÷ f
111=OC timer configure to 2^24 ÷ f
IP_REG Enable
1=duty control by IP_REG, 0=duty control by IP pin
DUTY_REG Enable
1=duty control by DUTY_REG, 0=duty control by DUTY pin
Output Driving Current Direction
1=CW, 0=CCW
FREE or START
1=FREE (PWM outputs disable), 0=START (PWM outputs enable)
n/a
B6
0
0= “PWM-PWM” commutation, 1=“PWM-ON” commutation
B6
0
sine wave PWM drive after angle detector locked
square wave PWM drive after angle detector locked
SR enable, 1=SR disable
SR function control by SYNCOFF bit
SR function control by OC_TMR pin
Low side minimum PWM duty output disable
Low side minimum PWM duty output enable
DT1
B5
0
B5
0
16
DT0
B4
0
OC_TMR0
SEQ_TBL
B4
0
B3
0
SYS
SYS
SYS
SYS
SYS
SYS
SYS
IP_EA
B3
SYNCOFF
0
Continued on the following page…
B2
0
DT_EA
B2
0
EXT_SYN
B1
0
CW
B1
1
www.fairchildsemi.com
FREE/nST
LPWM
B0
B0
1
0