CM68HC05C4ACFB Motorola / Freescale Semiconductor, CM68HC05C4ACFB Datasheet - Page 109

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CM68HC05C4ACFB

Manufacturer Part Number
CM68HC05C4ACFB
Description
Microcontroller
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
JMP opr
JMP opr
JMP opr ,X
JMP opr ,X
JMP ,X
JSR opr
JSR opr
JSR opr ,X
JSR opr ,X
JSR ,X
LDA # opr
LDA opr
LDA opr
LDA opr ,X
LDA opr ,X
LDA ,X
LDX # opr
LDX opr
LDX opr
LDX opr ,X
LDX opr ,X
LDX ,X
LSL opr
LSLA
LSLX
LSL opr ,X
LSL ,X
LSR opr
LSRA
LSRX
LSR opr ,X
LSR ,X
MUL
NEG opr
NEGA
NEGX
NEG opr ,X
NEG ,X
NOP
ORA # opr
ORA opr
ORA opr
ORA opr ,X
ORA opr ,X
ORA ,X
MC68HC05C4A
MOTOROLA
Source
Form
Unconditional Jump
Jump to Subroutine
Load Accumulator with Memory Byte
Load Index Register with Memory Byte
Logical Shift Left (Same as ASL)
Logical Shift Right
Unsigned Multiply
Negate Byte (Two’s Complement)
No Operation
Logical OR Accumulator with Memory
Rev. 4.0
Table 12-6. Instruction Set Summary (Continued)
Operation
Instruction Set
PC
Push (PCH); SP
Push (PCL); SP
0
C
PC
M
M
M
A
X
PC
b7
X : A
(PC) + n (n = 1, 2, or 3)
b7
Description
A
–(M) = $00 – (M)
–(M) = $00 – (M)
–(M) = $00 – (M)
–(A) = $00 – (A)
–(X) = $00 – (X)
Effective Address
A
X
Jump Address
(A)
(X)
(M)
(M)
(M)
(A)
(SP) – 1
b0
(SP) – 1
b0
C
0
— — — — —
— — — — —
— —
— —
— —
— — 0
— —
— — — — —
— —
H I N Z C
0 — — — 0
General Release Specification
Effect on
CCR
Instruction Set Summary
EXT
EXT
IMM
EXT
IMM
EXT
IMM
EXT
DIR
DIR
DIR
DIR
DIR
INH
INH
DIR
INH
INH
INH
DIR
INH
INH
INH
DIR
IX2
IX1
IX2
IX1
IX2
IX1
IX2
IX1
IX1
IX1
IX1
IX2
IX1
IX
IX
IX
IX
IX
IX
IX
IX
Instruction Set
BC
CC
DC
EC
BD
CD
DD
ED
CE
DE
CA
FC
FD
A6
B6
C6
D6
E6
AE
BE
EE
FE
9D
AA
BA
DA
EA
F6
38
48
58
68
78
34
44
54
64
74
42
30
40
50
60
70
FA
ee ff
ee ff
ee ff
ee ff
ee ff
hh ll
hh ll
hh ll
hh ll
hh ll
dd
dd
dd
dd
dd
dd
dd
dd
ff
ff
ff
ff
ff
ff
ff
ff
ii
ii
ii
109
11
2
3
4
3
2
5
6
7
6
5
2
3
4
5
4
3
2
3
4
5
4
3
5
3
3
6
5
5
3
3
6
5
5
3
3
6
5
2
2
3
4
5
4
3

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