CM68HC05C4ACFB Motorola / Freescale Semiconductor, CM68HC05C4ACFB Datasheet - Page 36

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CM68HC05C4ACFB

Manufacturer Part Number
CM68HC05C4ACFB
Description
Microcontroller
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
Interrupts
General Release Specification
36
NOTE:
Unlike reset, hardware interrupts do not cause the current instruction
execution to be halted, but they are considered pending until the current
instruction is complete.
The current instruction is the one already fetched and being operated on.
When the current instruction is complete, the processor checks all
pending hardware interrupts. If interrupts are not masked (CCR I bit
clear) and if the corresponding interrupt enable bit is set, the processor
proceeds with interrupt processing; otherwise, the next instruction is
fetched and executed.
If both an external interrupt and a timer interrupt are pending at the end
of an instruction execution, the external interrupt is serviced first. The
SWI is executed the same as any other instruction, regardless of the I-
bit state.
Vector addresses for all interrupts, including reset, are listed in
Table
Register
SCSR
SCSR
SCSR
SCSR
SCSR
SPSR
SPSR
TSR
TSR
TSR
N/A
N/A
N/A
4-1.
Table 4-1. Vector Addresses for Interrupts and Reset
MODF
Name
TDRE
RDRF
IDLE
SPIF
Flag
OCF
TOF
N/A
N/A
N/A
ICF
OR
TC
Interrupts
Reset
Software
External Interrupt
Timer Input Capture
Timer Output
Timer Overflow
Transmit Buffer
Transmit Complete
Receiver Buffer Full
Idle Line Detect
Overrun
Transfer Complete
Mode Fault
Compare
Empty
Interrupts
Interrupt
RESET
TIMER
TIMER
TIMER
CPU
SWI
IRQ
SCI
SCI
SCI
SCI
SCI
SPI
SPI
MC68HC05C4A
$1FFC–$1FFD
$1FFE–$1FFF
$1FFA–$1FFB
$1FF8–$1FF9
$1FF8–$1FF9
$1FF8–$1FF9
$1FF6–$1FF7
$1FF6–$1FF7
$1FF6–$1FF7
$1FF6–$1FF7
$1FF6–$1FF7
$1FF4–$1FF5
$1FF4–$1FF5
Address
Vector
MOTOROLA
Rev. 4.0

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