CM68HC05C4ACFB Motorola / Freescale Semiconductor, CM68HC05C4ACFB Datasheet - Page 43
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CM68HC05C4ACFB
Manufacturer Part Number
CM68HC05C4ACFB
Description
Microcontroller
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
1.CM68HC05C4ACFB.pdf
(156 pages)
- Current page: 43 of 156
- Download datasheet (649Kb)
5.5.2 COP During Wait Mode
5.5.3 COP During Stop Mode
5.5.4 COP During Self-Check Mode
MC68HC05C4A
MOTOROLA
—
Rev. 4.0
The COP will continue to operate normally during wait mode. The
software should pull the device out of wait mode periodically and reset
the COP by writing to the COPC bit to prevent a COP reset.
Stop mode disables the oscillator circuit and thereby turns the clock off
for the entire device. The COP counter will be reset when stop mode is
entered. If a reset is used to exit stop mode, the COP counter will be
reset after the 4064 cycles of delay after stop mode. If an interrupt is
used to exit stop mode, the COP counter will not be reset after the
4064-cycle delay and will have that many cycles already counted when
control is returned to the program.
The COP is disabled by hardware during self-check mode.
Resets
Computer Operating Properly (COP) Reset
General Release Specification
Resets
43
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