CM68HC05C4ACFB Motorola / Freescale Semiconductor, CM68HC05C4ACFB Datasheet - Page 61

• Manufacturer Part Number: CM68HC05C4ACFB
• Description: Microcontroller
• Manufacturer: Motorola / Freescale Semiconductor

8.8 Timer During Wait Mode
8.9 Timer During Stop Mode
MC68HC05C4A
MOTOROLA
—
Rev. 4.0
A problem can occur when using the timer overflow function and reading
the free-running counter at random times to measure an elapsed time.
Without incorporating the proper precautions into software, the timer
overflow flag could unintentionally be cleared if:
The counter alternate register at addresses $1A and $1B contains the
same value as the free-running counter (at address $18 and $19);
therefore, this alternate register can be read at any time without affecting
the timer overflow flag in the timer status register.
The CPU clock halts during wait mode, the timer remains active. If
interrupts are enabled, a timer interrupt will cause the processor to exit
the wait mode.
In stop mode, the timer stops counting and holds the last count value if
stop is exited by an interrupt. If reset is used, the counter is forced to
$FFFC. During stop, if at least one valid input capture edge occurs at the
TCAP pin, the input capture detect circuit is armed. This does not set any
timer flags or wake up the MCU. But if the MCU exits stop due to an
external interrupt, there is an active input capture flag and data from the
first valid edge that occurred during the stop mode. If reset is used to exit
stop mode, then no input capture flag or data remains, even if a valid
input capture edge occurred.
1. The timer status register is read or written when TOF is set.
2. The LSB of the free-running counter is read but not for the purpose
of servicing the flag.
Timer
General Release Specification
Timer During Wait Mode
Timer
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