T8207-BAL-DT Agere Systems, Inc., T8207-BAL-DT Datasheet - Page 114

• Manufacturer Part Number: T8207-BAL-DT
• Description: CelXpres ATM interconnect. Dry-bagget, tape & reel .
• Manufacturer: Agere Systems, Inc.

CelXpres T8207
ATM Interconnect
14 Registers
Table 89. TX PHY FIFO Routing 1 (TXPFR1) (017Eh)
114
port_rte[15:0]
Name
Bit Pos.
15:0
(continued)
Type
RW
Reset
0
Port Route [15:0]. Port Route [15:0]. Each bit in this field repre-
sents one of 16 queues from the 64 queues in the device, where the
least significant bit is queue 0, and the most significant bit is queue
15. These 64 queues are divided into sixteen groups of four queues
each. Except in a special case of sixteen ports, the four queues of
each group are divided between two PHY ports, as follows:
Group 0—queues 0 to 3—ports 0 and 1
Group 1—queues 4 to 7—ports 2 and 3
Group 2—queues 8 to 11—ports 4 and 5
Group 3—queues 12 to 15—ports 6 and 7
Group 4—queues 16 to 19—ports 8 and 9
Group 5—queues 20 to 23—ports 10 and 11
Group 6—queues 24 to 27—ports 12 and 13
Group 7—queues 28 to 31—ports 14 and 15
Group 8—queues 32 to 35—ports 16 and 17
Group 9—queues 36 to 39—ports 18 and 19
Group 10—queues 40 to 43—ports 20 and 21
Group 11—queues 44 to 47—ports 22 and 23
Group 12—queues 48 to 51—ports 24 and 25
Group 13—queues 52 to 55—ports 26 and 27
Group 14—queues 56 to 59—ports 28 and 29
Group 15—queues 60 to 63—ports 30 and 31
The bits in this field assign each queue in the group to either the
odd- or even-numbered PHY port in the group. If a bit is cleared to
‘0,’ the corresponding queue is assigned to the even-numbered
port. If the bit is set to ‘1,’ the corresponding queue is assigned to
the odd-numbered port. For eight PHY ports, where ports 0, 2, 4, 6,
8, 10, and 14 are used, this register is set to “0000000000000000,”
ultimately assigning 4 queues per port. For 32 PHY ports, if the
device is configured in normal 32-port mode, as described in Sec-
tion 9.2.2, Outgoing ATM Mode (Cells Sent by T8207), and in Sec-
tion 11.4, Queuing, this register is programmed to
“1010101010101010.” With this setting, PHY port 0 is assigned
queues 0 and 2, PHY port 1 is assigned queues 1 and 3, PHY port 2
is assigned queues 4 and 6, PHY port 3 is assigned queues 5 and
7, and so on.
For the special case of sixteen ports, if the T8207_sel bit is set,
these bits are ignored, and each port is assigned all four queues in
the group. PHY 0 is assigned queue group 0, or queues 0, 1, 2, and
3, PHY 1 is assigned queue group 1, or queues 4, 5, 6, and 7, and
so on.
For sixteen PHY ports, if the T8207_sel bit is cleared, the sixteen
ports can only use queues 0 to 31, and the queues are shared
between odd- and even-numbered ports. In the normal 16-port
mode, as described in Section 9.2.2, Outgoing ATM Mode (Cells
Sent by T8207), and in Section 11.4, Queuing, this register is pro-
grammed to “1010101010101010.” With this setting, PHY port 0 is
assigned queues 0 and 2, PHY port 1 is assigned queues 1 and 3,
PHY port 2 is assigned queues 4 and 6, PHY port 3 is assigned
queues 5 and 7, and so on.
Description
Advance Data Sheet
September 2001
Agere Systems Inc.