T8207-BAL-DT Agere Systems, Inc., T8207-BAL-DT Datasheet - Page 152

• Manufacturer Part Number: T8207-BAL-DT
• Description: CelXpres ATM interconnect. Dry-bagget, tape & reel .
• Manufacturer: Agere Systems, Inc.

CelXpres T8207
ATM Interconnect
19 Timing Requirements
19.2 UTOPIA Timing
Table 141. TX UTOPIA Timing (70 pF Load on Outputs)
Table 142. RX UTOPIA Timing (70 pF Load on Outputs)
152
u_txclk Frequency
u_txclk Duty Cycle
Output Delay from u_txclk, Applies to the Following Signals:
Input Setup Time to u_txclk, Applies to the Following Signals:
Input Hold Time from u_txclk, Applies to the Following Signals:
u_rxclk Frequency
u_rxclk Duty Cycle
Output Delay from u_rxclk, Applies to the Following Signals:
Input Setup Time to u_rxclk, Applies to the Following Signals:
Input Hold Time from u_rxclk, Applies to the Following Signals:
u_txaddr[4:0]
u_txdata[7:0]
u_txsoc
u_txprty
u_txenb*[3:0]
u_txclav[0],
u_shr_o
u_shr_i, u_txclav[3:0], u_txenb*[0], u_txaddr[4:0]
u_shr_i, u_txclav[3:0], u_txenb*[0], u_txaddr[4:0]
u_rxaddr[4:0],
u_rxenb*[3:0],
u_rxclav[0]
u_rxenb*[3:0], u_rxclav[3:0], u_rxdata[7:0], u_rxparity, u_rxsoc, u_rxaddr[4:0]
u_rxenb*[3:0], u_rxclav[3:0], u_rxdata[7:0], u_rxprty, u_rxsoc, u_rxaddr[4:0]
Parameter
Parameter
(continued)
2.96
2.99
2.65
2.56
2.86
2.53
5.09
Min
3.01
2.83
2.25
40
Min
0
4
1
40
0
4
1
Advance Data Sheet
Typ
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
September 2001
Agere Systems Inc.
10.32
10.72
13.79
Max
8.73
7.67
7.64
7.59
Max
8.83
7.86
6.88
50
60
50
60
—
—
—
—
MHz
Unit
MHz
Unit
ns
ns
ns
ns
ns
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
%