T8207-BAL-DT Agere Systems, Inc., T8207-BAL-DT Datasheet - Page 89
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T8207-BAL-DT
Manufacturer Part Number
T8207-BAL-DT
Description
CelXpres ATM interconnect. Dry-bagget, tape & reel .
Manufacturer
Agere Systems, Inc.
Datasheet
1.T8207-BAL-DT.pdf
(158 pages)
- Current page: 89 of 158
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Advance Data Sheet
September 2001
Agere Systems Inc.
14 Registers
Table 44. Extended Memory Access (Big Endian) (EMA_BE) (34h)
Table 45. Extended Memory Data High (Big Endian) (EMDH_BE) (36h)
Table 46. Extended Memory Data Low (Big Endian) (EMDL_BE) (37h)
ext_strt_acc
ext_we[1:0]
ext_d[15:8]
ext_a[5:1]
ext_d[7:0]
Name
Name
Name
Bit Pos. Type
Bit Pos. Type
Pos.
Bit
7:0
4:0
6:5
7:0
7
(continued)
Type
RW
RW
RW
RW
RW
Reset
Reset
Reset
0
0
0
0
0
Extended Access Data Low. The least significant byte of data to be
written to extended memory is written here before the extended write
begins. The least significant byte of data read from extended memory is
available here after the extended read is complete.
Extended Access Address [5:1]. This extended access register points
to words. ext_a[0] is hardwired to ‘0.’
Extended Access Write Enable. These bits are active-high write
enables for word accesses. If both bits are low, a read is performed. If
ext_we[1] is high, the contents of ext_d[15:8] are written, and if
ext_we[0] is high, the contents of ext_d[7:0] are written. If both bits are
high, both data bytes are written.
Start Access to Extended Memory. Write a ‘1’ to this bit to start the
access to the extended memory registers. This bit is automatically
cleared when the access is complete.
Extended Access Data High. The most significant byte of data to be
written to extended memory is written here before the extended write
begins. The most significant byte of data read from extended memory is
available here after the extended read is complete.
Description
Description
Description
ATM Interconnect
CelXpres T8207
89
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