HY27SS08561M Hynix Semiconductor, HY27SS08561M Datasheet - Page 3

• Manufacturer Part Number: HY27SS08561M
• Description: 256mbit 32mx8bit / 16mx16bit Nand Flash
• Manufacturer: Hynix Semiconductor

DESCRIPTION
The HYNIX HY27(U/S)SXX561M series is a family of non-volatile Flash memories that uses NAND cell technology. The
devices operate 3.3V and 1.8V voltage supply. The size of a Page is either 528 Bytes (512 + 16 spare) or 264 Words
(256 + 8 spare) depending on whether the device has a x8 or x16 bus width.
The address lines are multiplexed with the Data Input/ Output signals on a multiplexed x8 or x16 Input/ Output bus.
This interface reduces the pin count and makes it possible to migrate to other densities without changing the footprint.
Each block can be programmed and erased over 100,000 cycles. To extend the lifetime of NAND Flash devices it is
strongly recommended to implement an Error Correction Code (ECC). A Write Protect pin is available to give a hard-
ware protection against program and erase operations.
The devices feature an open-drain Ready/Busy output that can be used to identify if the Program/ Erase/Read (PER)
Controller is currently active. The use of an open-drain output allows the Ready/ Busy pins from several memories to
be connected to a single pull-up resistor.
A Copy Back command is available to optimize the management of defective blocks. When a Page Program operation
fails, the data can be programmed in another page without having to resend the data to be programmed.
The devices are available in the following packages:
Three options are available for the NAND Flash family:
page 0.
during the latency time do not stop the read operation.
- A Serial Number, which allows each device to be uniquely identified. The Serial Number options is subject to an NDA
(Non Disclosure Agreement) and so not described in the datasheet. For more details of this option contact your near-
est HYNIX Sales office.
Devices are shipped from the factory with Block 0 always valid and the memory content bits, in valid blocks, erased to
'1'.
Rev 0.7 / Oct. 2004
- 48-TSOP1 (12 x 20 x 1.2 mm)
- 48-WSOP1 (12 x 17 x 0.7 mm)
- 63-FBGA (9.0 x 11 x 1.0 mm, 6 x 8 ball array, 0.8mm pitch)
- Automatic Page 0 Read after Power-up, which allows the microcontroller to directly download the boot code from
- Chip Enable Dont Care, which allows code to be directly downloaded by a microcontroller, as Chip Enable transitions
256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
HY27US(08/16)561M Series
HY27SS(08/16)561M Series
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