FIN24AC Fairchild Semiconductor, FIN24AC Datasheet - Page 17

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FIN24AC

Manufacturer Part Number
FIN24AC
Description
Fin24ac ? ?serdes? 22-bit Bi-directional Serializer/deserializer
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2005 Fairchild Semiconductor Corporation
FIN24AC Rev. 1.0.3
Control Logic Timing Controls
Note:
9. Deserializer Enable Time includes the amount of time required for internal voltage and current references to stabilize.
Capacitance
t
t
t
t
t
t
Symbol
t
t
PLZ
PZL
PLZ
PZL
PLZ
PZL
PHL_DIR
Symbol
PLH_DIR
This time is significantly less than the PLL lock time and does not impact overall system startup time.
C
IO-DIFF
, t
, t
, t
, t
, t
, t
C
C
IN
IO
PHZ
PZH
PHZ
PZH
PHZ
PZH
,
Propagation Delay
DIRI-to-DIRO
Propagation Delay
DIRI-to-DP
Propagation Delay
DIRI-to-DP
Deserializer Disable Time:
S0 or S1 to DP
Deserializer Enable Time:
S0 or S1 to DP
Serializer Disable Time:
S0 or S1 to CKSO, DS
Serializer Enable Time:
S0 or S1 to CKSO, DS
Capacitance of Input Only Signals,
CKREF, STROBE, S1, S2, DIRI
Capacitance of Parallel Port Pins DP
Capacitance of Differential I/O Signals
Parameter
Parameter
DIRI LOW-to-HIGH or HIGH-to-LOW
DIRI LOW-to-HIGH
DIRI HIGH-to-LOW
DIRI = 0,
S1(2) = 0 and S2(1) = LOW-to-HIGH, Figure 29
DIRI = 0,
S1(2) = 0 and S2(1) = LOW-to-HIGH, Figure 29
DIRI = 1,
S1(2) = 0 and S2(1) = HIGH-to-LOW, Figure 28
DIRI = 1,
S1(2) and S2(1) = LOW-to-HIGH, Figure 28
(9)
1:12
Test Conditions
DIRI = 1, S1 = S2 = 0,
V
DIRI = 1, S1 = S2 = 0,
V
DIRI = 0, S1 = S2 = 0,
V
17
DD
DD
DD
= 2.5V
= 2.5V
= 2.775V
Test Conditions
Min.
Min. Typ. Max. Units
Typ. Max. Units
2.0
2.0
2.0
www.fairchildsemi.com
17.0
25.0
25.0
25.0
25.0
65.0
2.0
pF
pF
pF
ns
ns
ns
ns
µs
ns
ns

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