DSPIC30F3011 Microchip Technology Inc., DSPIC30F3011 Datasheet - Page 130

• Manufacturer Part Number: DSPIC30F3011
• Description: Dspic30f3010/3011 Enhanced Flash 16-bit Digital Signal Controller
• Manufacturer: Microchip Technology Inc.

dsPIC30F3010/3011
The configuration guidelines give the required setup
values for the conversion speeds above 500 ksps,
since they require external V
are some differences in the configuration procedure.
Configuration details that are not critical to the
conversion speed have been omitted.
FIGURE 19-2:
19.7.1
The configuration for 1 Msps operation is dependent on
whether a single input pin is to be sampled or whether
multiple pins will be sampled.
19.7.1.1
For conversions at 1 Msps for a single analog input, at
least two sample and hold channels must be enabled.
The analog input multiplexer must be configured so
that the same input pin is connected to both sample
and hold channels. The ADC converts the value held
on one S/H channel, while the second S/H channel
acquires a new input sample.
19.7.1.2
The ADC can also be used to sample multiple analog
inputs using multiple sample and hold channels. In this
case, the total 1 Msps conversion rate is divided among
the different input signals. For example, four inputs can
be sampled at a rate of 250 ksps for each signal or two
inputs could be sampled at a rate of 500 ksps for each
signal. Sequential sampling must be used in this con-
figuration to allow adequate sampling time on each
input.
DS70141D-page 128
1 Msps CONFIGURATION
GUIDELINE
Single Analog Input
Multiple Analog Inputs
ADC VOLTAGE REFERENCE SCHEMATIC
V
DD
REF
pins usage and there
10
11
1
2
3
4
5
6
7
8
9
V
V
SS
DD
dsPIC30F3011
Confidential
V
DD
10
R1
0.1 μF
The following figure depicts the recommended circuit
for the conversion rates above 500 ksps.
V
19.7.1.3
The following configuration items are required to
achieve a 1 Msps conversion rate.
• Comply with conditions provided in Table 20-2
• Connect external V
• Set SSRC<2:0> = 111 in the ADCON1 register to
• Enable automatic sampling by setting the ASAM
• Enable sequential sampling by clearing the
• Enable at least two sample and hold channels by
• Write the SMPI<3:0> control bits in the ADCON2
V
DD
SS
C2
the recommended circuit shown in Figure 19-2
enable the auto-convert option
control bit in the ADCON1 register
SIMSAM bit in the ADCON1 register
writing the CHPS<1:0> control bits in the
ADCON2 register
register for the desired number of conversions
between interrupts. At a minimum, set
SMPI<3:0> = 0001 since at least two sample and
hold channels should be enabled
33
32
31
30
29
28
27
26
25
24
23
V
DD
R2
10
C1
0.01 μF
1 Msps Configuration Items
V
DD
REF
C8
1 μF
C5
1 μF
© 2007 Microchip Technology Inc.
+ and V
V
V
DD
DD
0.1 μF
0.1 μF
C7
C4
REF
V
V
- pins following
DD
DD
0.01 μF
0.01 μF
C6
C3
V
V
DD
DD