DSPIC30F3011 Microchip Technology Inc., DSPIC30F3011 Datasheet - Page 214
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DSPIC30F3011
Manufacturer Part Number
DSPIC30F3011
Description
Dspic30f3010/3011 Enhanced Flash 16-bit Digital Signal Controller
Manufacturer
Microchip Technology Inc.
Datasheet
1.DSPIC30F3011.pdf
(220 pages)
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dsPIC30F3010/3011
PWM Operation During CPU Idle Mode............................ 100
PWM Operation During CPU Sleep Mode ........................ 100
PWM Output and Polarity Control ....................................... 99
PWM Output Override......................................................... 98
PWM Period ........................................................................ 94
PWM Special Event Trigger .............................................. 100
PWM Time Base ................................................................. 93
PWM Update Lockout ....................................................... 100
Q
QEA/QEB Input Characteristics ........................................ 183
QEI Module
Quadrature Decoder Timing Requirements ...................... 183
Quadrature Encoder Interface (QEI) Module ...................... 85
Quadrature Encoder Interface Interrupts ............................ 88
Quadrature Encoder Interface Logic ................................... 86
R
Reader Response ............................................................. 216
Reset......................................................................... 135, 141
Reset Sequence.................................................................. 43
Reset Timing Characteristics ............................................ 175
Reset Timing Requirements.............................................. 175
Resets
S
Simple Capture Event Mode
Simple OC/PWM Mode Timing Requirements.................. 181
Simple Output Compare Match Mode................................. 82
Simple PWM Mode ............................................................. 82
Single Pulse PWM Operation.............................................. 98
DS70141D-page 212
Enable Bits .................................................................. 99
Fault States ................................................................. 99
Modes ......................................................................... 99
Output Pin Control ...................................................... 99
Complementary Output Mode ..................................... 98
Synchronization .......................................................... 98
Postscaler ................................................................. 100
Continuous Up/Down Counting Modes ....................... 93
Double Update Mode .................................................. 94
Free Running Mode .................................................... 93
Postscaler ................................................................... 94
Prescaler ..................................................................... 94
Single Shot Mode........................................................ 93
External Clock Timing Requirements........................ 179
Index Pulse Timing Characteristics........................... 184
Index Pulse Timing Requirements ............................ 184
Operation During CPU Idle Mode ............................... 88
Operation During CPU Sleep Mode ............................ 87
Register Map............................................................... 89
Timer Operation During CPU Idle Mode ..................... 88
Timer Operation During CPU Sleep Mode.................. 87
Reset Sources ............................................................ 43
BOR, Programmable................................................. 143
POR .......................................................................... 141
POR with Long Crystal Start-up Time ....................... 143
POR, Operating without FSCM and PWRT .............. 143
Capture Buffer Operation ............................................ 78
Capture Prescaler ....................................................... 78
Hall Sensor Mode ....................................................... 78
Input Capture in CPU Idle Mode ................................. 79
Timer2 and Timer3 Selection Mode ............................ 78
Input Pin Fault Protection............................................ 82
Period.......................................................................... 83
Cycle-by-Cycle.................................................... 99
Latched ............................................................... 99
Confidential
Software Simulator (MPLAB SIM) .................................... 158
Software Stack Pointer, Frame Pointer .............................. 16
SPI Mode
SPI Module ....................................................................... 103
SPI Operation During CPU Idle Mode .............................. 105
SPI Operation During CPU Sleep Mode........................... 105
Status Register ................................................................... 16
Symbols Used in Opcode Descriptions ............................ 150
System Integration............................................................ 135
T
Temperature and Voltage Specifications
Timer1 Module.................................................................... 63
Timer2 and Timer3 Selection Mode.................................... 82
Timer2/3 Module................................................................. 67
Timer4/5 Module................................................................. 73
TimerQ (QEI Module) External Clock Timing
Timing Characteristics
CALL Stack Frame ..................................................... 31
Slave Select Synchronization ................................... 105
SPI1 Register Map.................................................... 106
Framed SPI Support ................................................. 103
Operating Function Description ................................ 103
SDOx Disable ........................................................... 103
Timing Characteristics
Timing Requirements
Word and Byte Communication ................................ 103
Overview................................................................... 135
Register Map ............................................................ 148
AC............................................................................. 169
DC ............................................................................ 161
16-bit Asynchronous Counter Mode ........................... 63
16-bit Synchronous Counter Mode ............................. 63
16-bit Timer Mode....................................................... 63
Gate Operation ........................................................... 64
Interrupt ...................................................................... 65
Operation During Sleep Mode .................................... 64
Prescaler .................................................................... 64
Real-Time Clock ......................................................... 65
Register Map .............................................................. 66
32-bit Synchronous Counter Mode ............................. 67
32-bit Timer Mode....................................................... 67
ADC Event Trigger...................................................... 70
Gate Operation ........................................................... 70
Interrupt ...................................................................... 70
Operation During Sleep Mode .................................... 70
Register Map .............................................................. 71
Timer Prescaler .......................................................... 70
Register Map .............................................................. 76
Characteristics .......................................................... 179
A/D Conversion
ADC Conversion
Bandgap Start-up Time............................................. 176
Master Mode (CKE = 0).................................... 185
Master Mode (CKE = 1).................................... 186
Slave Mode (CKE = 1).............................. 187, 188
Master Mode (CKE = 0).................................... 185
Master Mode (CKE = 1).................................... 186
Slave Mode (CKE = 0)...................................... 187
Slave Mode (CKE = 1)...................................... 189
RTC Interrupts .................................................... 65
RTC Oscillator Operation ................................... 65
10-Bit High-speed (CHPS = 01, SIMSAM = 0,
ASAM = 1, SSRC = 111, SAMC = 00001)........ 197
10-Bit High-speed (CHPS = 01, SIMSAM = 0,
ASAM = 0, SSRC = 000) .................................. 196
© 2007 Microchip Technology Inc.