DSPIC30F3011 Microchip Technology Inc., DSPIC30F3011 Datasheet - Page 211
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DSPIC30F3011
Manufacturer Part Number
DSPIC30F3011
Description
Dspic30f3010/3011 Enhanced Flash 16-bit Digital Signal Controller
Manufacturer
Microchip Technology Inc.
Datasheet
1.DSPIC30F3011.pdf
(220 pages)
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INDEX
Numerics
10-bit High Speed A/D
10-Bit High-Speed Analog-to-Digital Converter (ADC)
16-bit Up/Down Position Counter Mode.............................. 86
A
A/D
AC Characteristics ............................................................ 169
AC Temperature and Voltage Specifications .................... 169
ADC
Address Generator Units .................................................... 35
Alternate 16-bit Timer/Counter............................................ 87
Alternate Vector Table ........................................................ 45
Assembler
Automatic Clock Stretch.................................................... 110
B
Bandgap Start-up Time
Barrel Shifter ....................................................................... 22
Bit-Reversed Addressing .................................................... 38
© 2007 Microchip Technology Inc.
A/D Acquisition Requirements .................................. 130
Aborting a Conversion .............................................. 126
ADCHS ..................................................................... 123
ADCON1 ................................................................... 123
ADCON2 ................................................................... 123
ADCON3 ................................................................... 123
ADCSSL.................................................................... 123
ADPCFG ................................................................... 123
Configuring Analog Port Pins.................................... 132
Connection Considerations....................................... 132
Conversion Operation ............................................... 125
Effects of a Reset...................................................... 131
Operation During CPU Idle Mode ............................. 131
Operation During CPU Sleep Mode.......................... 131
Output Formats ......................................................... 131
Power-Down Modes.................................................. 131
Programming the Start of Conversion Trigger .......... 126
Register Map............................................................. 133
Result Buffer ............................................................. 125
Sampling Requirements............................................ 130
Selecting the Conversion Sequence......................... 125
Module ...................................................................... 123
Count Direction Status ................................................ 86
Error Checking ............................................................ 86
1 Msps Configuration Guideline................................ 128
600 ksps Configuration Guideline ............................. 129
Conversion Rate Parameters.................................... 127
Selecting the Conversion Clock ................................ 126
Voltage Reference Schematic .................................. 128
Load Conditions ........................................................ 169
750 ksps Configuration Guideline ............................. 129
Conversion Speeds................................................... 127
MPASM Assembler................................................... 158
During 10-bit Addressing (STREN = 1)..................... 110
During 7-bit Addressing (STREN = 1)....................... 110
Receive Mode ........................................................... 110
Transmit Mode .......................................................... 110
Requirements............................................................ 176
Timing Characteristics .............................................. 176
Example ...................................................................... 38
Implementation ........................................................... 38
Modifier Values (table) ................................................ 39
Sequence Table (16-Entry)......................................... 39
Confidential
Block Diagrams
BOR Characteristics ......................................................... 168
BOR. See Brown-out Reset
Brown-out Reset
Brown-out Reset (BOR).................................................... 135
C
C Compilers
Center-Aligned PWM .......................................................... 95
CLKOUT and I/O Timing
Code Examples
Code Protection ................................................................ 135
Complementary PWM Operation........................................ 96
Configuring Analog Port Pins.............................................. 58
Control Registers ................................................................ 48
Core Overview .................................................................... 15
Core Register Map.............................................................. 31
Customer Change Notification Service............................. 215
Customer Notification Service .......................................... 215
Customer Support............................................................. 215
D
Data Access from Program Memory Using Program
Data Accumulators and Adder/Subtracter .......................... 20
dsPIC30F3010/3011
10-bit High Speed ADC Functional........................... 124
16-bit Timer1 Module.................................................. 64
16-bit Timer4 .............................................................. 74
16-bit Timer5 .............................................................. 75
32-bit Timer4/5 ........................................................... 73
Dedicated Port Structure ............................................ 57
DSP Engine ................................................................ 19
dsPIC30F3010.............................................................. 9
dsPIC30F3011.............................................................. 8
External Power-on Reset Circuit .............................. 143
I
Input Capture Mode.................................................... 77
Oscillator System...................................................... 137
Output Compare Mode ............................................... 81
PWM Module .............................................................. 92
Quadrature Encoder Interface .................................... 85
Reset System ........................................................... 141
Shared Port Structure................................................. 58
SPI............................................................................ 104
SPI Master/Slave Connection................................... 104
UART Receiver......................................................... 116
UART Transmitter..................................................... 115
Timing Requirements ............................................... 175
MPLAB C18.............................................................. 158
MPLAB C30.............................................................. 158
Characteristics.......................................................... 174
Requirements ........................................................... 174
Data EEPROM Block Erase ....................................... 54
Data EEPROM Block Write ........................................ 56
Data EEPROM Read.................................................. 53
Data EEPROM Word Erase ....................................... 54
Data EEPROM Word Write ........................................ 55
Erasing a Row of Program Memory ........................... 49
Initiating a Programming Sequence ........................... 50
Loading Write Latches ................................................ 50
NVMADR .................................................................... 48
NVMADRU ................................................................. 48
NVMCON.................................................................... 48
NVMKEY .................................................................... 48
Space Visibility ........................................................... 26
2
C ............................................................................ 108
DS70141D-page 209