S5D2650 Samsung Semiconductor, Inc., S5D2650 Datasheet - Page 10

• Manufacturer Part Number: S5D2650
• Description: Multistandard Video Decoder/scaler
• Manufacturer: Samsung Semiconductor, Inc.

S5D2650 Data Sheet
1.1.4. Pixel Clock and Timing Mode Selection for Digital Video Input
Pixel clock and synchronization timing can be individually selected to either come from an external generator or be
generated internally. In addition, if synchronization is provided by an external source, the S5D2650 supports
embedded syncs as defined in CCIR 656, or TTL HS and VS inputs. Selection of pixel clock is via CKDIR bit in
CMDD register. Timing selection is through either SYNDIR or EAV bit.
By using an external pixel clock, the reference clock input at XTALI is no longer required. Additional register bits
have to be programmed for different selections of pixel clock and timing, which are detailed in Table 2. The
following register/bit-settings are required for digital video input:
INSEL[2:0] = 6,7 TSTCGN = 1. DMCTL[1:0] = 2 or 3. UGAIN = 238.
BRT = 34. SAT = 229. RGBH = UNIT = PED = 1.
Pixel Clock TTL Timing
*1
*2
*3
CKDIR
: CKDIR = 0 - CK is output and is internally generated. CKDIR = 1 - CK is input from an external source.
: SYNDIR = 0 - HS1 and VS are output. SYNDIR = 1 - HS1 and VS are inputs from external sources.
: EAV = 0 - chip will not sync to embedded timing. EAV = 1 - chip will sync to embedded timing.
0
0
0
1
1
1
*1
EXV[7:0]
ELECTRONICS
SYNDIR
HS1
VS
Table 2: Digital Video Input Pixel Clock and Timing Selection
From Luma ADC
From Cb/Cr ADC
0
0
1
0
0
1
*2
Embedded
Timing
EAV
0
1
0
0
1
0
*3
Data
Demux
Timing
Control
Figure 3.
VMEN
1
0
0
1
0
0
Y
C
8-bit YCbCr Input Data Path
TSTGPH TSTGEN TSTGFR PIXSEL
0
1
1
0
1
1
Additional Register Programming
1
1
1
1
1
1
Luma
Processing
Chroma
Processing
3
3
1
3
1
1
0 if input
data is at
square
pixel
rate.
1 if input
is at
CCIR
601 rate.
To Luma Scaler
To Chroma Scaler
MULTIMEDIA VIDEO
MNFMT
1
1
1
1
1
1
PAGE 10 OF 95
0 if input
is 50 Hz
video.
1 if input
is 60 Hz
video.
IFMT
7/18/03