S5D2650 Samsung Semiconductor, Inc., S5D2650 Datasheet - Page 5

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S5D2650

Manufacturer Part Number
S5D2650
Description
Multistandard Video Decoder/scaler
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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S5D2650 Data Sheet
PIN DESCRIPTION (Continued)
MULTI-PURPOSE I/O PORTS
PID
OEN
CK
CK2
CCDAT
CCEN
PORTA
PORTB(SCH)
SCLK
SDAT
AEX0 - AEX1
VDD3
VDD1
VDDA
VDDP
VSS
VSSP
HOST INTERFACE
POWER AND GROUND
Pin Name
ELECTRONICS
17
15
18
21
73
74
58
24
75
72
69 - 70
9,20,59
11,12,42,43,66,
67
85,89,93
98
1,2,6,13,14,19,
40,41,49-52,60,
64,65,77-80,
81-83,87,91,95,
96
100
Pin #
Type
GND Common ground.
GND Common ground for PLL.
3.3V Digital power supply for input, output buffers.
1.8V Digital power supply for core logic.
3.3V Analog power supply for ADC, AGC and reference circuits.
3.3V Analog power supply for clock generation circuit(PLL).
I/O
I/O
I/O
I/O
O
O
O
O
I
I
I
PAL ID flag. Pahse Alternate Line flag
Output data, timing and clock 3-state output control.
(Default : tied to VDD)
System clock. (Default : 27MHz output. When the EXV port is used
as an input, this can be programmed as an input system clock.)
Pixel rate output clock (Default : 13.5 MHz)
Sliced VBI data output. Data can be from Closed Caption, Teletext,
Intercast, or WSS type encoded data.
When high, this pin indicates that valid VBI data is being clocked out
at the CCDAT pin or at the digital video output.
Multi-purpose I/O portA.
Multi-purpose I/O portB.
Serial clock for IIC host interface. (5V tolerant schmitt trigger pin)
Serial data for IIC host interface.(5V tolerant schmitt triggered open
drain Pins)
Device ID selection for IIC host interface.
Description
MULTIMEDIA VIDEO
PAGE 5 OF 95
7/18/03

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