S5D2650 Samsung Semiconductor, Inc., S5D2650 Datasheet - Page 85

• Manufacturer Part Number: S5D2650
• Description: Multistandard Video Decoder/scaler
• Manufacturer: Samsung Semiconductor, Inc.

S5D2650 Data Sheet
Index
0x3E
VSDEL[5:0]
NOVIDC
TR_MS
Mnemonic
VSDEL
ELECTRONICS
When the chip is programmed for digital video input operation, this register provides an offset
for the internal line counter to align with input video (VS can be either from the VS pin or from
embedded timing code). The register content is unsigned.
Allows NOVID bit to be output to PORTB (pin 24).
0
1
Enable alternative initial tracking mode state machine.
0
1
TR_MS
bit 7
Normal operation.*
The NOVID bit is output to PORTB if DATAB[2:0]=1 and DIRB=1.
Normal operation - Horizontal tracking mode is controlled by the HFSEL[1:0] bits.*
Variable tracking modes during locking time.
NOVIDC
bit 6
VS Delay Control
bit 5
bit 4
bit 3
VSDEL[5:0]
bit 2
MULTIMEDIA VIDEO
bit 1
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bit 0
7/18/03