S5D2650 Samsung Semiconductor, Inc., S5D2650 Datasheet - Page 91

• Manufacturer Part Number: S5D2650
• Description: Multistandard Video Decoder/scaler
• Manufacturer: Samsung Semiconductor, Inc.

S5D2650 Data Sheet
Digital I/O Characteristics
Timing Characteristics - Digital Inputs
Clock and Data Timing
Input low voltage
Input high voltage
Schmitt trigger, negative going threshold
(SCLK,SDAT)
Schmitt trigger, positive going threshold
(SCLK,SDAT)
Input low current (V
Input high current(V
Digital output low voltage (I
Digital output high voltage (I
three-state output leakage current
Digital output capacitance
Maximum capacitance load for digital data pins C
Maximum capacitance load for CK and CK2
outputs
XTALI input pulse width low
XTALI input pulse width high
Analog video input to digital video output delay t
Pulse width high for CK
Pulse width high for CK2
Delay from rising edge of CK to CK2
Delay from rising edge CK to data change
(including pins Y0-Y7, C0-C7, HAV, VAV, EHAV,
EVAV, HS1, HS2, VS, ODD, PID, SCH)
Minimum hold time from rising edge of CK for
data output)
Timing Characteristics -IIC Host Interface
SCLK clock frequency
Capacitive load for each bus line
Hold time for START condition
Setup time for STOP condition
Rise and fall times for SCLK and SDAT
SCLK minimum pulse width low
SCLK minimum pulse width high
SDAT setup time to rising edge of SCLK
ELECTRONICS
Characteristics
IN
IN
= VSS)
= VDD)
OL
OH
=1~24mA)
=-1 ~ -24mA)
V
V
VT-
VT+
I
I
V
V
I
C
C
t
t
t
t
t
t
(CK is output)
t
(CK is input)
t
r
C
t
t
t
t
t
t s
IL
IH
OZ
pwlX
pwhX
dCHIP
pwhCK
pwhCK2
CK2
dD
dD
hD
hSTA
sSTO
R
pwlSCLK
pwhSCLK
SCLK
Symbol
IL
IH
OL
OH
OUT
L-DATA
L-CK
b
SDAT
, t
F
Min
100
-10
-10
-10
2.0
0.8
2.4
0.3
0.6
0.6
1.3
0.6
15
15
15
30
20
0
18.5
Typ
120
20
20
37
4
7
7
MULTIMEDIA VIDEO
Max
+10
+10
400
400
300
0.8
2.0
0.4
10
30
60
22
44
7
PAGE 91 OF 95
Units
kHz
CK
µA
µA
µA
pF
pF
pF
pF
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
ns
µs
µs
ns
V
V
V
V
V
V
7/18/03