S5D2650 Samsung Semiconductor, Inc., S5D2650 Datasheet - Page 48

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S5D2650

Manufacturer Part Number
S5D2650
Description
Multistandard Video Decoder/scaler
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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S5D2650 Data Sheet
2. CONTROL REGISTER DESCRIPTION
This section contains information concerning the programmable control registers. Table 14 provides the default
power up values for each index, and a bit map for each register. The following pages describe each register in
detail and the possible programing values (an * indicates the power-on default). Gamma correction registers are
write only. When the index register points to any of the Gamma correction register, the Gamma look-up table is put
into a program mode. Normal operation resumes when the index is outside the range from 0x40 to 0xFF.
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
Index Mnemonic Default
STAT
CMDA
CMDB
CMDC
CMDD
HAVB
HAVE
HS1B
HS1E
HS2B
HS2E
AGC
HXTRA
CDEM
PORTAB
LUMA
CON
BRT
CHROMA
CHROMB
DEMOD
SAT
HUE
VERTIA
VERTIB
VERTIC
HSCLL
HSCLH
VSCLL
VSCLH
OFMTA
OFMTB
ELECTRONICS
RO
2C
C0
FC
0B
FF
20
40
40
00
00
14
40
00
00
80
00
00
00
02
00
00
08
00
00
00
00
14
01
00
00
00
MNYCMB
MNCCMB
ACCFRZ
FSCDET
POWDN
AGCGN
OUTHIZ
CHIPID
VSVAV
VMEN
DIRB
EAV
7
0
GAMEN[1:0]
Table 14: Register Summary
HAVB[10:8]
HYLPF[2:0]
CADC_PD
SECDET
TSTGE1
VALIGN
VBIFLG
FSEC
PALM
UNIT
VSE
6
EVAND[1:0]
CDLY[3:0]
YCMBCO[2:0]
CCMBCO[2:0]
DATAB[2:0]
AGCOVF
TBC_ON
CDMLPF
NOVID
CKDIR
RGBH
PALN
5
0
HFSEL[1:0]
OENC[1:0]
VSCL[5:0]
HSCL[6:0]
AGCFRZ COMP_PH
CTRACK
FFRDET
TSTGPK
HYBWI
EVHS1
CBW
PED
4
CIFCMP[1:0]
HSCL[14:7]
VSCL[13:6]
INPSL[1:0]
CONT[7:0]
HAVB[7:0]
HAVE[7:0]
HS1B[8:1]
HS1E[8:1]
HS2B[8:1]
HS2E[8:1]
Bit Map
AGC[7:0]
HUE[7:0]
BRT[7:0]
SAT[7:0]
HAVE[10:8]
ACMBEN
TSTGPH
PALDET
HYBWR
HYDEC
EVHAV
VRT2X
XT24
DIRA
3
MNFSC[1:0]
CORE[1:0]
EVEHAV
SYNDIR
PIXSEL
CTRAP
VYBW
CDET
SCHCMP[3:0]
TSTGFR[1:0]
VSCLEN[1:0]
2
0
MULTIMEDIA VIDEO
OFMT[3:0]
DATAA[2:0]
VCTRL[2:0]
INSEL[2:0]
ACMBCO ACMBRE
HS1BE0
EVAVEV
MNFMT
HLOCK
EVAVG
PROG
MNSECAM[1:0]
1
0
CKILL[1:0]
HYPK[1:0]
PAGE 48 OF 95
CMBMOD
GPPORT
TSTGEN
EVAVOD
EVANDL
HS2BE0
CLOCK
IFMT
0
0
0
7/18/03

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